ISP1705AETTM STEricsson, ISP1705AETTM Datasheet - Page 26

• Manufacturer Part Number: ISP1705AETTM
• Manufacturer: STEricsson

Specifications of ISP1705AETTM

• Lead Free Status / RoHS Status: Compliant

ISP1705_2
Product data sheet
9.2.3 6-pin full-speed or low-speed serial mode
9.2.4 3-pin full-speed or low-speed serial mode
Table 11.
[1]
If the link requires a 6-pin serial interface to transmit and receive full-speed or low-speed
USB data, it can set the ISP1705 to 6-pin serial mode. In 6-pin serial mode, the data bus
definition changes to that shown in
6PIN_FSLS_SERIAL bit in the INTF_CTRL register (see
6-pin serial mode, the link asserts the STP signal. This is provided primarily for links that
contain legacy full-speed or low-speed functionality, providing a more cost-effective
upgrade path to high-speed functionality. An interrupt pin is also provided to inform the link
of USB events. If the link requires CLOCK to be running during 6-pin serial mode, the
CLOCK_SUSPENDM register bit must be set to logic 1 before entering 6-pin serial mode.
For more information on 6-pin serial mode enter and exit protocols, refer to UTMI+ Low
Pin Interface (ULPI) Specification Rev. 1.1.
Table 12.
[1]
If the link requires a 3-pin serial interface to transmit and receive full-speed or low-speed
USB data, it can set the ISP1705 to 3-pin serial mode. In 3-pin serial mode, the data bus
definition changes to that shown in
3PIN_FSLS_SERIAL bit in the INTF_CTRL register (see
3-pin serial mode, the link asserts the STP signal. This is provided primarily for links that
contain legacy full-speed or low-speed functionality, providing a more cost-effective
upgrade path to high-speed functionality. An interrupt pin is also provided to inform the link
of USB events. If the link requires CLOCK to be running during 3-pin serial mode, the
CLOCK_SUSPENDM register bit must be set to logic 1 before entering 3-pin serial mode.
Signal
Reserved
INT
Reserved
Signal
TX_ENABLE
TX_DAT
TX_SE0
INT
RX_DP
RX_DM
RX_RCV
Reserved
I = input; O = output.
I = input; O = output.
Signal mapping during low-power mode
Signal mapping for 6-pin serial mode
Maps to
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
Maps to
DATA2
DATA3
DATA[7:4]
Rev. 02 — 21 January 2009
Direction
I
I
I
O
O
O
O
O
Direction
O
O
O
Table
Table
[1]
Description
active-HIGH transmit enable
transmit differential data on DP and DM
transmit single-ended zero on DP and DM
active-HIGH interrupt indication; will be asserted and
latched whenever any unmasked interrupt occurs
single-ended receive data from DP
single-ended receive data from DM
differential receive data from DP and DM
reserved; the ISP1705 will drive this pin to LOW
12. To enter 6-pin serial mode, the link sets the
13. To enter 3-pin serial mode, the link sets the
[1]
Description
reserved; the ISP1705 will drive this pin to
LOW
active-HIGH interrupt indication; will be
asserted and latched whenever any
unmasked interrupt occurs
reserved; the ISP1705 will drive these pins to
LOW
…continued
ULPI Hi-Speed USB transceiver
Section
Section
11.6) to logic 1. To exit
11.6) to logic 1. To exit
© ST-NXP Wireless 2009. All rights reserved.
ISP1705
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