ISP1705AETTM STEricsson, ISP1705AETTM Datasheet - Page 27

• Manufacturer Part Number: ISP1705AETTM
• Manufacturer: STEricsson

Specifications of ISP1705AETTM

• Lead Free Status / RoHS Status: Compliant

ISP1705_2
Product data sheet
9.2.5 Transparent UART mode
For more information on 3-pin serial mode enter and exit protocols, refer to UTMI+ Low
Pin Interface (ULPI) Specification Rev. 1.1.
Table 13.
[1]
In transparent UART mode, the ISP1705 functions as a voltage level shifter between
following pins:
The USB transceiver is used to drive the UART transmitting signal on the DM line. The
rise time and the fall time of the transmitting signal is determined by whether a full-speed
or low-speed transceiver is in use. It is recommended to use a low-speed transceiver if the
UART bit rate is below 921 kbit/s for better EMI performance. If the UART bit rate is equal
to or above 921 kbit/s, a full-speed transceiver can be used.
In transparent UART mode, data bus definitions change to that shown in
Table 14.
[1]
Transparent UART mode is entered by setting some register bits in ULPI registers. The
recommended sequence is:
Signal
TX_ENABLE
DAT
SE0
INT
Reserved
Signal
TXD
RXD
Reserved
INT
Reserved
•
•
I = input; O = output.
From pin DATA0 (V
From pin DP (2.7 V level) to pin DATA1 (V
I = input; O = output.
Signal mapping for 3-pin serial mode
UART signal mapping
Maps to
DATA0
DATA1
DATA2
DATA3
DATA[7:4]
Maps to
DATA0
DATA1
DATA2
DATA3
DATA[7:4]
Rev. 02 — 21 January 2009
Direction
I
O
O
O
O
CC(I/O)
Direction
I
I/O
I/O
O
O
level) to pin DM (2.7 V level).
[1]
Description
UART TXD signal that is routed to the DM pin
UART RXD signal that is routed from the DP pin
reserved; the ISP1705 will drive this pin to LOW in UART
mode
active-HIGH interrupt indication; will be asserted and
latched whenever any unmasked interrupt occurs
reserved; the ISP1705 will drive these pins to LOW in
UART mode
[1]
Description
active-HIGH transmit enable
transmit differential data on DP and DM when
TX_ENABLE is HIGH
receive differential data from DP and DM when
TX_ENABLE is LOW
transmit single-ended zero on DP and DM when
TX_ENABLE is HIGH
receive single-ended zero from DP and DM when
TX_ENABLE is LOW
active-HIGH interrupt indication; will be asserted
and latched whenever any unmasked interrupt
occurs
reserved; the ISP1705 will drive these pins to LOW
CC(I/O)
level).
ULPI Hi-Speed USB transceiver
© ST-NXP Wireless 2009. All rights reserved.
ISP1705
Table
14.
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