ISP1705AETTM STEricsson, ISP1705AETTM Datasheet - Page 36

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ISP1705AETTM

Manufacturer Part Number
ISP1705AETTM
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1705AETTM

Lead Free Status / RoHS Status
Compliant

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ISP1705_2
Product data sheet
10.3.3.2 Standard USB peripheral controllers
10.3.3.3 OTG devices
10.3.4.1 RxActive
10.3.4 RxEvent encoding
Standard peripherals must be able to detect when V
operation. SESS_VLD must be enabled to detect the start and end of USB peripheral
operations. Detection of A_VBUS_VLD and SESS_END thresholds is not needed for
standard peripherals.
When an OTG device is configured as an OTG A-device, it must be able to provide a
minimum of 8 mA on V
no need for an overcurrent detection circuit because the internal A_VBUS_VLD
comparator is sufficient. If the OTG A-device provides more than 100 mA on V
overcurrent detector must be used and
uses SESS_VLD to detect when an OTG B-device is initiating V
When an OTG device is configured as an OTG B-device, SESS_VLD must be used to
detect when V
when V
pulsing SRP.
The RxEvent field (see
packets received on the USB bus. RxActive and RxError are defined in USB 2.0
Transceiver Macrocell Interface (UTMI) Specification Ver. 1.05. HostDisconnect is defined
in UTMI+ Specification Rev. 1.0. A short definition is also given in the following
subsections.
Table 22.
When the ISP1705 has detected a SYNC pattern on the USB bus, it signals an RxActive
event to the link. An RxActive event can be communicated using two methods. The first
method is for the ISP1705 to simultaneously assert DIR and NXT. The second method is
for the ISP1705 to send an RXCMD to the link with the RxActive field in the RxEvent bits
set to logic 1. The link must be capable of detecting both methods. RxActive frames the
receive packet from the first byte to the last byte.
The link must assume that RxActive is set to logic 0 when indicated in an RXCMD or when
DIR is deasserted, whichever occurs first.
The link uses RxActive to time high-speed packets and ensure that bus turnaround times
are met. For more information on the USB packet timing, see
Value
00
01
11
10
3. If it is not necessary to qualify the fault indicator with the internal A_VBUS_VLD
comparator, set the IND_PASSTHRU bit in the INTF_CTRL register (see
Section
BUS
Encoded USB event signals
has dropped to a LOW level, allowing the B-device to safely initiate V
11.6) to logic 1.
BUS
is at a sufficient level for operation. SESS_END must be used to detect
RxActive
0
1
1
X
Rev. 02 — 21 January 2009
BUS
Table
. If the OTG A-device provides less than 100 mA, then there is
22) of the RXCMD informs the link of information related
Section 10.3.3.1
RxError
0
0
1
X
BUS
ULPI Hi-Speed USB transceiver
is at a sufficient level for
applies. The OTG A-device also
Section
HostDisconnect
0
0
0
1
BUS
© ST-NXP Wireless 2009. All rights reserved.
pulsing SRP.
10.6.1.
ISP1705
BUS
BUS
, an
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