ISP1705AETTM STEricsson, ISP1705AETTM Datasheet - Page 59

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ISP1705AETTM

Manufacturer Part Number
ISP1705AETTM
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1705AETTM

Lead Free Status / RoHS Status
Compliant

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Table 36.
Table 38.
ISP1705_2
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
USB_INTR_EN_R - USB interrupt enable rising register (address R = 0Dh to 0Fh, W = 0Dh, S = 0Eh,
C = 0Fh) bit allocation
USB_INTR_EN_F - USB interrupt enable falling register (address R = 10h to 12h, W = 10h, S = 11h,
C = 12h) bit allocation
R/W/S/C
R/W/S/C
11.8 USB_INTR_EN_R register
11.9 USB_INTR_EN_F register
7
0
7
0
The bits in this register enable interrupts and RXCMDs to be sent when the corresponding
bits in the USB_INTR_STAT register change from logic 0 to logic 1. By default, all
transitions are enabled.
Table 37.
The bits in this register enable interrupts and RXCMDs to be sent when the corresponding
bits in the USB_INTR_STAT register change from logic 1 to logic 0. By default, all
transitions are enabled. See
Bit
7 to 5
4
3
2
1
0
reserved
R/W/S/C
reserved
R/W/S/C
6
0
6
0
Symbol
-
ID_GND_R
SESS_END_R
SESS_VALID_R
VBUS_VALID_R
HOST_DISCON_R
USB_INTR_EN_R - USB interrupt enable rising register (address R = 0Dh to 0Fh,
W = 0Dh, S = 0Eh, C = 0Fh) bit description
R/W/S/C
R/W/S/C
5
0
5
0
Rev. 02 — 21 January 2009
Table 36
ID_GND_R
ID_GND_F
Table
R/W/S/C
R/W/S/C
Description
reserved
ID ground rise: Enables interrupts and RXCMDs for logic 0 to
logic 1 transitions on ID_GND.
Session end rise: Enables interrupts and RXCMDs for logic 0 to
logic 1 transitions on SESS_END.
Session valid rise: Enables interrupts and RXCMDs for logic 0
to logic 1 transitions on SESS_VLD.
V
logic 1 transitions on A_VBUS_VLD.
Host disconnect rise: Enables interrupts and RXCMDs for
logic 0 to logic 1 transitions on HOST_DISCON.
BUS
4
1
4
1
shows the bit allocation of the register.
38.
valid rise: Enables interrupts and RXCMDs for logic 0 to
R/W/S/C
R/W/S/C
END_R
SESS_
SESS_
END_F
3
1
3
1
VALID_R
VALID_F
R/W/S/C
R/W/S/C
SESS_
SESS_
ULPI Hi-Speed USB transceiver
2
1
2
1
VALID_R
VALID_F
R/W/S/C
R/W/S/C
© ST-NXP Wireless 2009. All rights reserved.
VBUS_
VBUS_
1
1
1
1
ISP1705
DISCON_R
DISCON_F
R/W/S/C
R/W/S/C
HOST_
HOST_
0
1
0
1
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