STAC9750XXTAEC1X IDT, Integrated Device Technology Inc, STAC9750XXTAEC1X Datasheet

STAC9750XXTAEC1X

Manufacturer Part Number
STAC9750XXTAEC1X
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of STAC9750XXTAEC1X

Single Supply Voltage (typ)
3.3/5V
Single Supply Voltage (min)
3.135V
Single Supply Voltage (max)
3.465/5.25V
Package Type
TQFP
Lead Free Status / RoHS Status
Compliant

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Price
Part Number:
STAC9750XXTAEC1X
Manufacturer:
SIGMATE
Quantity:
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Part Number:
STAC9750XXTAEC1X
Manufacturer:
IDT
Quantity:
19 953
VALUE-LINE TWO-CHANNEL AC’97 CODECS
OVERVIEW
Value-Line Stereo AC'97 CODECs with headphone drive
and SPDIF outputs.
FEATURES
KEY SPECIFICATIONS
RELATED MATERIALS
IDT™
VALUE-LINE TWO-CHANNEL AC’97 CODECS
Full Duplex Stereo 18-bit ADCs and 20-bit DACs
AC’97 Rev 2.2 Compliant
High Performance Σ∆ Technology
SPDIF Output
Crystal Elimination Circuit
Headphone amplifier
Independent Sample Rates for ADCs & DACs
(hardware SRCs)
20dB or 30dB Microphone Boost Capability
90dB SNR LINE-LINE
5-Wire AC-Link Protocol Compliance
Digital-Ready Architecture
General Purpose I/O
+3.3 V (STAC9751) and +5 V (STAC9750) Analog
Power Supply Options
Pin Compatible With STAC9700/21/56/66
IDT Surround (SS3D) Stereo Enhancement
Energy Saving Dynamic Power Modes
Analog LINE_OUT SNR: 90dB
Digital DAC SNR: 89dB
Digital ADC SNR: 85dB
Full-scale Total Harmonic Distortion: 0.005%
Crosstalk between Input Channels: -70dB
Spurious Tone Rejection: 100dB
Data Sheet
Reference Designs for MB, CNR, ACR and PCI
applications
Audio Precision Performance Plots
1
DESCRIPTION
IDT's STAC9750/9751 are general purpose, full duplex,
audio CODECs conforming to the analog component spec-
ification of AC'97 (Audio CODEC 97 Component Specifica-
tion Rev. 2.2). They have 18-bit ADCs and 20-bit DACs.
The STAC9750/9751 incorporate IDT's proprietary Σ∆ tech-
nology to achieve a DAC SNR in excess of 89dB.
The DACs, ADCs and mixer are integrated with analog I/
Os, which include four analog line-level stereo inputs, two
analog line-level mono inputs, two stereo outputs, and one
mono output channel.
The STAC9750/9751 include digital input/output capability
for support of modern PC systems and also an output that
supports the SPDIF format.
The STAC9750/9751 is a standard 2-channel stereo
CODEC. With IDT’s headphone drive capability, head-
phones can be driven with no external amplifier.
The STAC9750/9751 may be used as a secondary
CODEC, with the STAC9700/21/44/56/08/84/66 as the pri-
mary, in a multiple CODEC configuration conforming to the
AC'97 Rev. 2.2 specification. This configuration can provide
the true six-channel, AC-3 playback required for DVD appli-
cations.
The STAC9750/9751 communicates via the five-wire
AC-Link to any digital component of AC'97, providing flexi-
bility in the audio system design.
The STAC9750/9751 supports General Purpose Input/Out-
put (GPIO), as well as SPDIF output. These digital I/O
options provide for a number of advanced architectural
implementations, with volume controls and digital mixing
capabilities built directly into the CODEC.
Packaged in an AC'97 compliant 48-pin TQFP, the
STAC9750/9751 can be placed on the motherboard,
daughter boards, PCI, AMR, CNR, or ACR cards.
STAC9750/9751
STAC9750/9751
DATASHEET
V 5.8 103106

Related parts for STAC9750XXTAEC1X

STAC9750XXTAEC1X Summary of contents

Page 1

... DESCRIPTION IDT's STAC9750/9751 are general purpose, full duplex, audio CODECs conforming to the analog component spec- ification of AC'97 (Audio CODEC 97 Component Specifica- tion Rev. 2.2). They have 18-bit ADCs and 20-bit DACs. The STAC9750/9751 incorporate IDT's proprietary Σ∆ tech- nology to achieve a DAC SNR in excess of 89dB. ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS TABLE OF CONTENTS 1. PRODUCT BRIEF ...................................................................................................................... 5 1.1. Features ............................................................................................................................................ 5 1.2. Description ........................................................................................................................................ 5 1.3. STAC9750/9751 Block Diagram ........................................................................................................ 6 1.4. Key Specifications ............................................................................................................................. 7 1.5. Related Materials .............................................................................................................................. 7 1.6. Additional Support ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS LIST OF FIGURES Figure 1. STAC9750/9751 Block Diagram ...................................................................................................... 6 Figure 2. Cold Reset Timing ......................................................................................................................... 15 Figure 3. Warm Reset Timing ....................................................................................................................... 15 Figure 4. Clocks Timing ................................................................................................................................ 16 Figure 5. Data Setup and ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS LIST OF TABLES Table 1. STAC9751 Analog Performance Characteristics ............................................................................. 13 Table 2. Cold Reset Specifications ................................................................................................................ 15 Table 3. Warm Reset Specifications .............................................................................................................. 15 Table 4. Clocks Specifications ....................................................................................................................... 16 Table 5. Clock Mode ...

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... Energy saving dynamic power modes 1.2. Description IDT's STAC9750/9751 are general purpose 18-bit ADC, 20-bit DAC, full duplex, audio CODECs con- forming to the analog component specification of AC'97 (Audio Codec ‘97 Component Specification Rev. 2.2). The STAC9750/9751 incorporate IDT's proprietary Σ∆ technology to achieve a DAC SNR in excess ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS isters. The two DACs convert the digital stereo PCM-out content to audio. The MIXER block combines the PCM_OUT with any analog sources, to drive the LINE_OUT and HP_OUT outputs. The MONO_OUT delivers either microphone only, ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 1.4. Key Specifications • Analog LINE_OUT SNR • Digital DAC SNR • Digital ADC SNR • Full-scale Total Harmonic Distortion: 0.005% • Crosstalk between Input Channels: -70 dB • ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 2. CHARACTERISTICS/SPECIFICATIONS 2.1. Electrical Specifications 2.1.1. Absolute Maximum Ratings: Stresses above the ratings listed below can cause permanent damage to the STAC9750/9751. These ratings, which are standard values for IDT commercially rated parts, are stress ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 2.1.3. Power Consumption Parameter Digital Supply Current + 3.3 V Digital Analog Supply Current (at Reset state Analog + 3.3 V Analog Power Down Status (individually asserted) All PR measurements taken while ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 2.1.4. Revision Comparison Analog PR0 62 PR1 63 PR2 48 PR3 40 PR4 76 PR5 75 PR6 97 2.1.5. AC-Link Static Digital Specifications ( ºC, DVdd = 3.3 ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 2.1.6. STAC9750 Analog Performance Characteristics ( ºC, AVdd = 5.0 V ± 5%, DVdd = 3.3 V ± 5%, AVss=DVss KHz input sine wave; ambient Sample Frequency = 48 KHz; 0dB ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS Parameter Interchannel Gain Mismatch ADC Interchannel Gain Mismatch DAC Note: 1. With +30 dB Boost on, 1.0 Vrms with Boost off. 2. Ratio of Full Scale signal to idle channel noise output is measured “A ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 2.1.7. STAC9751 Analog Performance Characteristics ( ºC, AVdd = DVdd = 3.3 V ± 5%, AVss=DVss KHz input sine wave; Sample Fre- ambient quency = 48 KHz; 0dB = 1 Vrms, ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS Parameter Interchannel Gain Mismatch ADC Interchannel Gain Mismatch DAC Gain Drift Table 1. STAC9751 Analog Performance Characteristics (Continued) Note: 1. With +30 dB Boost on, 1.0 Vrms with Boost off. 2. Ratio of Full Scale ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 2.2. AC Timing Characteristics ( °C, AVdd = 3 ± 5%, DVdd = 3.3 V ± 5%, AVss = DVss = external ambient load) 2.2.1. ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 2.2.3. Clocks BIT_CLK SYNC BIT_CLK frequency BIT_CLK period BIT_CLK output jitter BLT_CLK high pulse width (Note 1) BIT_CLK low pulse width (Note 1) SYNC frequency SYNC period SYNC high pulse width SYNC low pulse width ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 2.2.4. Data Setup and Hold (47.5-75 pF external load ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 2.2.6. AC-Link Low Power Mode Timing End ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 3. TYPICAL CONNECTION DIAGRAM 0.1 µ *OPTIONAL 32 0.1 µF 1 µF* 29 820 pF 30 820 pF Note: 1. See Appendix ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 4. AC-LINK Figure 10 shows the AC-Link point to point serial interconnect between the STAC9750/9751 and its companion controller. All digital audio streams and command/status information are communicated over this AC-Link. See “Digital Interface” on ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 5. DIGITAL INTERFACE 5.1. AC-Link Digital Serial Interface Protocol The STAC9750/9751 communicates to the AC'97 controller via a 5-wire, digital, serial, AC-Link inter- face, which is a bi-directional, fixed rate, serial PCM digital stream. All ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS OUTGOING STREAMS INCOMING STREAMS TAG PHASE 5.1.1. AC-Link Audio Output Frame (SDATA_OUT) The audio output frame data streams correspond to the multiplexed bundles of all digital output data targeting the STAC9750/9751 DAC inputs, and control ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS SDATA_OUT’s composite stream is MSB justified (MSB first) with all non-valid slots’ bit positions stuffed with 0s by the AC'97 controller. When mono audio sample streams are sent from the AC'97 controller necessary ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 5.1.1.2. The command data port is used to deliver 16-bit control register write data in the event that the cur- rent command port operation is a write cycle (as indicated by Slot 1, bit 19). ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 5.1.1.8. Audio output frame slot 8 is the composite digital audio right surround stream programming option, PCM data from slots 7 and 8 may be used to supply data to the primary DACs. ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS Prior to any attempts at putting STAC9750/9751 into operation the AC'97 controller should poll the first bit in the audio input frame (SDATA_IN slot 0, bit 15) for an indication that STAC9750/9751 has become “CODEC ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS Audio input frame slot 1’s stream echoes the control register index, for historical reference, for the data to be returned in slot 2. (Assuming that slots 1 and 2 had been tagged “valid” by STAC9750/ ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 5.1.2.6. Audio input frame slot 6 is the left channel output of STAC9750/9751 input MUX, post-ADC. STAC9750/9751 ADCs are implemented to support 18-bit resolution. STAC9750/9751 outputs its ADC data (MSB first), and stuffs any trailing ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS STAC9750/9751 ADCs are implemented to support 18-bit resolution. STAC9750/9751 outputs its ADC data (MSB first), and stuffs any trailing non-valid bit positions with 0 to fill out its 20-bit time slot. See section 6.5.25; page ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS The AC'97 controller should also drive SYNC, and SDATA_OUT low after programming the STAC9750/9751 to this low power mode. 5.3. Waking up the AC-Link Once the STAC9750/9751 has halted BIT_CLK, there are only two ways ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6. STAC9750/9751 MIXER The STAC9750/9751 includes analog and digital mixers for maximum flexibility. The analog mixer is designed to the AC'97 specification to manage the playback and record of all digital and analog audio sources ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS Source PC_BEEP PHONE MIC1 MIC2 LINE_IN CD VIDEO AUX PCM out Destination HP_OUT LINE_OUT MONO_OUT PCM in SPDIF Figure 18. STAC9751 2-Channel Mixer Functional Diagram 28h: D5-D4 Slot PCMOut Select Analog Audio Sources ADCRecord IDT™ ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.1. Analog Mixer Input The mixer provides recording and playback of any audio sources or output mix of all sources. The STAC9750/9751 supports the following input sources: • Any mono or stereo source • Mono ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.5. Programming Registers Address 00h Reset 02h Master Volume 04h HP_OUT Mixer Volume 06h Master Volume MONO 0Ah PC Beep Mixer Volume 0Ch Phone Mixer Volume 0Eh Microphone Mixer Volume 10h Line In Mixer Volume ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.5.1. Reset (00h) Default: 6990h D15 D14 RSRVD4 SE4 D7 ID7 Writing any value to this register performs a register reset, which causes all registers to revert to their default values. Reading this register returns ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS Note: If optional bits D13 & register 04h are set to 1, then the corresponding attenuation is set to 46.5dB and the register reads will produce 1Fh as a value for this attenuation/gain ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.5.4. Analog Mixer Input Gain Registers (Index 0Ch - 18h) These registers control the gain/attenuation for each of the analog inputs. Each step corresponds to approximately 1.5 dB. The MSB of the register is the ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.5.4.4. Default: 8808h D15 D14 Mute D7 Reserved 6.5.4.5. Default: 8808h D15 D14 Mute D7 Reserved 6.5.4.6. Default: 8808h D15 D14 Mute D7 Reserved 6.5.4.7. Default: 8808h D15 D14 Mute D7 Reserved 6.5.5. Record Select ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS Used to select the record source independently for right and left. Bit(s) 15:11 10:8 7:3 2:0 6.5.6. Record Gain (1Ch) Default: 8000h (corresponding gain with mute on) D15 D14 Mute D7 The ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS This register is used to control some miscellaneous functions. Below is a summary of each bit and its function. The MS bit controls the MIC selector. The LPBK bit enables loopback of the ADC output ...

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... I0 that no conflict is possible with modem slot 12 - GPI functionality. Some AC’97 2.2 compliant controllers do not support audio CODEC interrupt infrastructure. In either case, S/W should poll the interrupt status after initiating a sense cycle and wait for Sense Cycle Max Delay to determine if an interrupting event has occurred. ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS This read/write register is used to program power down states and monitor subsystem readiness. The EAPD external control is also supported through this register. 6.5.10.1. Ready Status The lower half of this register is read ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS The Extended Audio ID register is a read-only register, except for bits D5:D4. ID1 and ID0 echo the configuration of the CODEC as defined by the programming of pins 45 and 46 externally. A returned ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.5.12. Extended Audio Control/Status (2Ah) Default: 0400h D15 D14 D7 Reserved 6.5.12.1. Variable Rate Sampling Enable The Extended Audio Status Control register also contains one active bit to enable or disable the Vari- able Sampling ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.5.12.4. SPSA1, SPSA0 (SPDIF Slot Assignment) SPSA1 and SPSA0 combine to provide the slot assignments for the SPDIF data. The following details the slot assignment relationship between SPSA1 and SPSA0. SPSA[1, ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.5.14. PCM DAC Rate (2Ch) Default: BB80h D15 D14 SR15 SR14 D7 SR7 SR6 6.5.15. PCM LR ADC Rate (32h) Default: BB80h D15 D14 SR15 SR14 D7 SR7 SR6 6.5.16. SPDIF Control (3Ah) Default: 2A00h ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS Bit(s) Reset 10 pin 48 is held high at powerup, 28h D2 will be low indicating no SPDIF available and the regis- ter 3Ah ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS Bit(s) Access 15:2 Read Only 1 Read / Write 0 Read / Write 6.5.19. GPIO Pin Polarity/Type Register (4Eh) Default: FFFFh D15 D14 D7 Bit(s) Access 15:2 Read Only 1 Read / Write 0 Read ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.5.21. GPIO Pin Mask Register (52h) Default: 0000h D15 D14 D7 Bit(s) Access 15:2 Read Only 1 Read / Write 0 Read / Write 6.5.22. GPIO Pin Status Register (54h) Default: 0000h D15 D14 D7 ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS Bit(s) Access 15:2 Read Only 1 Read / Write 0 Read / Write 6.5.23. Digital Audio Control (6Ah) Default: 0000h D15 D14 D7 Bit(s) Reset 15 This read/write register is used to program ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.5.24. Revision Code (6Ch) Default: 00xxh D15 D14 The device Revision Code register (index 6Ch) contains a software readable revision-specific code used to identify performance, architectural, or software differences between various device ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.5.25.2. ADC Data on AC LINK Bits D5-D4 select slots for ADC data on ACLINK. 6.5.25.3. MuteFix Disable Bit D6 controls the enable and disable of the MuteFix functions. • MUTE FIX Enabled ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.5.25.6. 72h Enable (70h) Default: 0000h D15 D14 EN15 EN14 D7 EN7 EN6 6.5.25.7. Analog Current Adjust (72h) Default: 0000h D15 D14 D7 INT APOP The Analog Current Adjust register (index 72h locked ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.5.26. GPIO Access Register (74h) Default: 0800h D15 D14 EAPD Reserved D7 Bit( 7:0 The GPIO Access Register requires that the output enable bits (D11, D9 and ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 6.5.27.2. ADC High Pass FIlter Bypass(78h) Default: 0000h D15 D14 D7 D6 6.5.28. Vendor ID1 and ID2 (Index 7Ch and 7Eh) These two registers contain four 8-bit ID codes. The first three codes have been ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 7. LOW POWER MODES The STAC9750/9751 is capable of operating at reduced power when no activity is required. The state of power-down is controlled by the Powerdown Register (26h). There are 7 commands of sep- ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS Figure 20 illustrates a state when all the mixers should work with the static volume settings that are contained in their associated registers. This configuration can be used when playing a CD (or exter- nal ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 8. MULTIPLE CODEC SUPPORT The STAC9750/9751 provides support for the multi-CODEC option according to the Intel AC'97, rev 2.2 specification. By definition there can be only one Primary CODEC (CODEC ID 00) and up to ...

Page 59

STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 8.2. Secondary CODEC Register Access Definitions The AC'97 Digital Controller can independently access Primary and Secondary CODEC registers by using a 2-bit CODEC ID field (chip select) which is defined as the LSBs of Output ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 9. TESTABILITY The STAC9750/9751 has two test modes. One is for ATE in-circuit test and the other is restricted for IDT’s internal use. STAC9750/9751 enters the ATE in-circuit test mode if SDATA_OUT is sampled high ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 10. PIN DESCRIPTION MONO_OUT 37 AVdd2 38 HP_OUT_L 39 HP_COMM 40 HP_OUT_R 41 AVss2 42 GPIO0 43 GPIO1 44 CID0 45 CID1 46 EAPD 47 SPDIF 48 Pin 48: To Enable SPDIF, use an 1 ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 10.1. Digital I/O These signals connect the STAC9750/9751 to its AC'97 controller counterpart, an external crystal, multi-CODEC selection and external audio amplifier. Pin Name XTL_IN XTL_OUT SDATA_OUT BIT_CLK SDATA__IN SYNC RESET GPIO0 ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 10.2. Analog I/O These signals connect the STAC9750/9751 to analog sources and sinks, including microphones and speakers. Pin Name PC-BEEP PHONE AUX_L AUX_R VIDEO_L VIDEO_R CD_L CD_GND CD_R MIC1 MIC2 LINE_IN_L LINE_IN_R LINE_OUT_L LINE_OUT_R MONO_OUT ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 10.3. Filter/References/GPIO These signals are connected to resistors, capacitors, specific voltages, or provide General Purpose I/O. Signal Name VREF VREFOUT AFILT1 AFILT2 CAP2 10.4. Power and Ground Signals Pin Name AVdd1 AVdd2 AVss1 AVss2 DVdd1 ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 11. ORDERING INFORMATION Ordering Information Part Number STAC9750XXTAEyyX STAC9751XXTAEyyX NOTE: When ordering these parts the “yy” will be replaced with the CODEC revision. Add an “R” to the end of any of these part numbers ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 12. PACKAGE DRAWINGS 12.1. 48-Pin LQFP pin LQFP Pin 1 IDT™ VALUE-LINE TWO-CHANNEL AC’97 CODECS Figure 22. Package Drawing - 48-pin LQFP LQFP Dimensions in ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 13. SOLDER REFLOW PROFILE 13.1. Standard Reflow Profile Data Note: These devices can be hand soldered at 360 FROM: IPC / JEDEC J-STD-020C “Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices” (www.jedec.org/download). Profile ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 13.2. Pb Free Process - Package Classification Reflow Temperatures Package Type IDT™ VALUE-LINE TWO-CHANNEL AC’97 CODECS LQFP 48-pin 68 MSL Reflow Temperature o 3 260 STAC9750/9751 PC AUDIO C* V 5.8 103106 ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 14. APPENDIX A: SPLIT INDEPENDENT POWER SUPPLY OPERATION In PC applications, one power supply input to the STAC9750/9751 may be derived from a supply regulator (as shown in Figure 24) and the other directly from ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS Figure 24. STAC9750/9751 Split Independent Power Supply Operation Typical Connection Diagram 3. ± 5% 0.1 µF 1 µF 12 PC_BEEP 13 PHONE 14 AUX_L 15 AUX_R 16 VIDEO_L 17 VIDEO_R 18 CD_L 19 ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 15. APPENDIX B: PROGRAMMING REGISTERS Reg # Name D15 D14 D13 D12 00h Reset RSRVD SE4 SE3 SE2 02h Master Volume Mute RSRVD ML5 ML4 HP_OUT 04h Mute RSRVD HPL5 HPL4 Mixer Volume Master Volume ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS 16. REVISION HISTORY Revision Date Corrected error on page 26: Slot 1 Status Address Port, bit SLot Request not Reserved as stated in rev 5.1 Added CD_GND elaboration note on connection diagram, ...

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STAC9750/9751 VALUE-LINE TWO-CHANNEL AC’97 CODECS Innovate with IDT audio for high fidelity. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 ...

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