AD1847JP Analog Devices Inc, AD1847JP Datasheet - Page 7

• Manufacturer Part Number: AD1847JP
• Manufacturer: Analog Devices Inc

Specifications of AD1847JP

• Single Supply Voltage (typ): 5V
• Single Supply Voltage (min): 4.75V
• Single Supply Voltage (max): 5.25V
• Package Type: PLCC
• Lead Free Status / RoHS Status: Not Compliant

REV. B
Miscellaneous
Pin Name
XTAL1I
XTAL1O
XTAL2I
XTAL2O
XCTL1:O
V
V
L_FILT
R_FILT
NC
Power Supplies
Pin Name
V
GNDA
V
GNDD
(Continued from page 1)
The
attenuator provides independent user volume control over each
DAC channel. Nyquist images are removed from the DACs’
analog stereo output by on-chip switched-capacitor and
continuous-time filters. Two stereo pairs of auxiliary line-level
inputs can also be mixed in the analog domain with the DAC
output.
The AD1847 serial data interface uses a Time Division Multi-
plex (TDM) scheme that is compatible with DSP serial ports
configured in Multi-Channel Mode with 32 16-bit time slots
(i.e., SPORT0 on the ADSP-2101, ADSP-2115, etc.).
AUDIO FUNCTIONAL DESCRIPTION
This section overviews the functionality of the AD1847 and is
intended as a general introduction to the capabilities of the de-
vice. As much as possible, detailed reference information has
been placed in “Control Registers” and other sections. The user
is not expected to refer repeatedly to this section.
Analog Inputs
The AD1847 SoundPort Stereo Codec accepts stereo line-level
inputs. All inputs should be capacitively coupled (ac-coupled) to
the AD1847. LINE1, LINE2, and AUX1, and post-mixed DAC
output analog stereo signals are multiplexed to the internal pro-
grammable gain amplifier (PGA) stage.
The PGA following the input multiplexer allows independent
selectable gains for each channel from 0 to 22.5 dB in +1.5 dB
steps. The Codec can operate either in a global stereo mode or
in a global mono mode with left-channel inputs appearing at
both channel outputs.
REF
REFI
CC
DD
DACs are preceded by a digital interpolation filter. An
PLCC
40
41
42
43
37 & 36
16
15
21
19
29
14, 20, 24
3, 10, 35, 38
PLCC
13 & 25
2, 9, 34, 39
TQFP
34
35
36
37
31 & 30
10
9
15
13
23
I/O
I
O
I
O
O
O
I
I
I
TQFP
7 & 19
8, 14, 18
40, 3, 28, 33
41, 4, 29, 32
Description
24.576 MHz Crystal #1 Input.
24.576 MHz Crystal #1 Output.
16.9344 MHz Crystal #2 Input.
16.9344 MHz Crystal #2 Output.
External Control. These TTL signals reflect the current status of register bits inside the
AD1847. They can be used for signaling or to control external logic.
Voltage Reference. Nominal 2.25 volt reference available externally as a voltage datum
for dc-coupling and level-shifting. V
Voltage Reference Internal. Voltage reference filter point for external bypassing only.
Left Channel Filter Capacitor. This pin requires a 1.0 F capacitor to analog ground
for proper operation.
Right Channel Filter Capacitor. This pin requires a 1.0 F capacitor to analog ground
for proper operation.
No Connect. Do not connect.
–7–
I/O
I
I
I
I
Analog Mixing
AUX1 and AUX2 analog stereo signals can be mixed in the ana-
log domain with the DAC output. Each channel of each auxil-
iary analog input can be independently gained/attenuated from
+12 dB to –34.5 dB in –1.5 dB steps or completely muted. The
post-mixed DAC output is available on L_OUT and R_OUT
externally and as an input to the ADCs.
Even if the AD1847 is not playing back data from its DACs, the
analog mix function can still be active.
Analog-to-Digital Datapath
The
tor. A single pole of passive filtering is all that is required for
antialiasing the analog input because of the ADC’s high 64
times oversampling ratio. The ADCs include digital decimation
filters that low-pass filter the input to 0.4
word rate or “sampling frequency.”) ADC input overrange con-
ditions will cause status bits to be set that can be read.
Digital-to-Analog Datapath
The
pass digital interpolation filter. The anti-imaging interpolation
filter oversamples and digitally filters the higher frequency im-
ages. The attenuator allows independent control of each DAC
channel from 0 dB to –94.5 dB in 1.5 dB steps plus full mute.
The DACs’
signal to a single-bit stream. The DAC outputs are then filtered
in the analog domain by a combination of switched-capacitor
and continuous-time filters. These filters remove the very high
frequency components of the DAC bitstream output. No exter-
nal components are required.
ADCs incorporate a proprietary fourth-order modula-
DACs contain a programmable attenuator and a low-
REF
Description
Analog Supply Voltage (+5 V).
Analog Ground.
Digital Supply Voltage (+5 V).
Digital Ground.
noise shapers also oversample and convert the
should not have any signal dependent load.
F
S
. (“F
AD1847
S
’’ is the