AD5232BRUZ100-REEL7 Analog Devices Inc, AD5232BRUZ100-REEL7 Datasheet - Page 18

• Manufacturer Part Number: AD5232BRUZ100-REEL7
• Manufacturer: Analog Devices Inc

Specifications of AD5232BRUZ100-REEL7

• Number Of Elements: 2
• # Of Taps: 256
• Resistance (max): 100KOhm
• Power Supply Requirement: Single/Dual
• Interface Type: Serial (4-Wire/SPI)
• Single Supply Voltage (typ): 3/5V
• Dual Supply Voltage (typ): ±2.5V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): ±2.25V
• Dual Supply Voltage (max): ±2.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Compliant

AD5232
USING ADDITIONAL INTERNAL, NONVOLATILE
EEMEM
The AD5232 contains additional internal user storage registers
(EEMEM) for saving constants and other 8-bit data. Table 9
provides an address map of the internal nonvolatile storage
registers, which are shown in the functional block diagram as
EEMEM1, EEMEM2, and bytes of USER EEMEM.
Note the following about EEMEM function:
•
•
•
•
Table 9. EEMEM Address Map
EEMEM Address
(ADDR)
0000
0001
0010
0011
0100
0101
***
1111
TERMINAL VOLTAGE OPERATING RANGE
The positive V
potentiometer defines the boundary conditions for proper
3-terminal programmable resistance operations. Signals present
on Terminal A, Terminal B, and Wiper Terminal W that exceed
V
The ground pin of the AD5232 device is used primarily as
a digital ground reference that needs to be tied to the common
ground of the PCB. The digital input logic signals to the AD5232
must be referenced to the ground (GND) pin of the device and
satisfy the minimum input logic high level and the maximum
input logic low level that are defined in the Specifications section.
An internal level shift circuit between the digital interface and
the wiper switch control ensures that the common-mode voltage
range of the three terminals, Terminal A, Terminal B, and
Wiper Terminal W, extends from V
DD
or V
RDAC data stored in EEMEM locations are transferred to
their corresponding RDACx register at power-on or when
Command Instruction 1 and Command Instruction 8 are
executed.
USERx refers to internal nonvolatile EEMEM registers that are
available to store and retrieve constants by using Command
Instruction 3 and Command Instruction 9, respectively.
The EEMEM locations are one byte each (eight bits).
Execution of Command Instruction 1 leaves the device in
the read mode power consumption state. When the final
Command Instruction 1 is executed, the user should perform
an NOP (Command Instruction 0) to return the device to
the low power idle state.
SS
are clamped by a forward biased diode (see Figure 39).
DD
and negative V
EEMEM Contents of Each Device
EEMEM (ADDR)
RDAC1
RDAC2
USER 1
USER 2
USER 3
USER 4
***
USER 14
SS
power supply of the digital
SS
to V
DD
.
Rev. A | Page 18 of 24
Table 10. RDAC and Digital Register Address Map
Register Address (ADDR)
0000
0001
1
DETAILED POTENTIOMETER OPERATION
The actual structure of the RDACx is designed to emulate the
performance of a mechanical potentiometer. The RDACx contains
multiple strings of connected resistor segments, with an array of
analog switches that act as the wiper connection to several points
along the resistor array. The number of points is equal to the
resolution of the device. For example, the AD5232 has 256 con-
nection points, allowing it to provide better than 0.5% setability
resolution. Figure 40 provides an equivalent diagram of the con-
nections between the three terminals that make up one channel of
the RDACx. The SW
only one of the SW(0) to SW(2
depending on the resistance step decoded from the data bits. The
resistance contributed by R
resistance.
The RDACx registers contain data that determines the position of the
variable resistor wiper.
Figure 39. Maximum Terminal Voltages Set by V
R
NOTES
1. DIGITAL CIRCUITRY
Figure 40. Equivalent RDAC Structure
REGISTER
S
DECODER
OMITTED FOR CLARITY
= R
WIPER
RDAC
AND
A
AB
and SW
/2
N
W
must be accounted for in the output
R
R
R
B
S
S
S
N
switches are always on, whereas
–1) switches is on at a time,
Name of Register
RDAC1
RDAC2
SW(2
SW(2
SW(1)
SW(2)
SW
SW
N –
N –
A
B
1)
2)
W
A
B
DD
W
V
V
A
B
and V
DD
SS
1
SS