PF38F3050M0Y3DEA

Manufacturer Part NumberPF38F3050M0Y3DEA
ManufacturerMicron Technology Inc
PF38F3050M0Y3DEA datasheets

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Specifications of PF38F3050M0Y3DEA

Operating Supply Voltage (max)1.95VOperating Temperature (max)85C
MountingSurface MountLead Free Status / RoHS StatusCompliant
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Numonyx™ Wireless Flash Memory (W18)
Product Features
High Performance Read-While-Write/Erase
— Burst frequency at 66 MHz
(zero wait states)
— 60 ns Initial access read speed
— 11 ns Burst mode read speed
— 20 ns Page mode read speed
— 4-, 8-, 16-, and Continuous-Word Burst
mode reads
— Burst and Page mode reads in all Blocks,
across all partition boundaries
— Burst Suspend feature
— Enhanced Factory Programming at 3.1 µs/
word
Security
— 128-Bit OTP Protection Register:
64 unique pre-programmed bits +
64 user-programmable bits
— Absolute Write Protection with V
— Individual and Instantaneous Block Locking/
Unlocking with Lock-Down Capability
Quality and Reliability
— Temperature Range: –40 °C to +85 °C
— 100K Erase Cycles per Block
— 90 nm ETOX™ IX Process
— 130 nm ETOX™ VIII Process
Architecture
— Multiple 4-Mbit partitions
— Dual Operation: RWW or RWE
— Parameter block size = 4-Kword
— Main block size = 32-Kword
— Top or bottom parameter devices
— 16-bit wide data bus
Software
— 5 µs (typ.) Program and Erase Suspend
latency time
— Flash Data Integrator (FDI) and Common
Flash Interface (CFI) Compatible
— Programmable WAIT signal polarity
Packaging and Power
— 90 nm: 32- and 64-Mbit in VF BGA
— 130 nm: 32-, 64-, and 128-Mbit in VF BGA
— 130 nm: 128-Mbit in QUAD+ package
at ground
PP
— 56 Active Ball Matrix, 0.75 mm Ball-Pitch
— V
= 1.70 V to 1.95 V
CC
— V
(90 nm) = 1.7 V to 1.95 V
CCQ
— V
(130 nm) = 1.7 V to 2.24 V or 1.35 V
CCQ
to 1.80 V
— V
(130 nm) = 1.35 V to 2.24 V
CCQ
— Standby current (130 nm): 8 µA (typ.)
— Read current: 8 mA (4-word burst, typ.)
Datasheet
Order Number: 290701-18
November 2007

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PF38F3050M0Y3DEA Summary of contents

  • Page 1

    Numonyx™ Wireless Flash Memory (W18) Product Features High Performance Read-While-Write/Erase — Burst frequency at 66 MHz (zero wait states) — Initial access read speed — Burst mode read speed — Page mode read speed ...

  • Page 2

    INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR Legal L ines and D isc laim er s Legal L ines and D isc laim er s OTHERWISE, TO ANY ...

  • Page 3

    Numonyx™ Wireless Flash Memory (W18) Contents 1.0 Introduction .............................................................................................................. 7 1.1 Nomenclature ..................................................................................................... 7 1.2 Conventions ....................................................................................................... 8 2.0 Functional Overview .................................................................................................. 9 2.1 Memory Map and Partitioning .............................................................................. 10 3.0 Package Information ............................................................................................... 13 3.1 W18 — ...

  • Page 4

    CFI Query .........................................................................................................57 10.6 Read Status Register..........................................................................................57 10.7 Clear Status Register .........................................................................................58 11.0 Program Operations .................................................................................................59 11.1 Word Program ...................................................................................................59 11.2 Factory Programming .........................................................................................60 11.3 Enhanced Factory Program (EFP) .........................................................................61 11.3.1 EFP Requirements and Considerations .......................................................61 11.3.2 Setup....................................................................................................62 11.3.3 ...

  • Page 5

    Numonyx™ Wireless Flash Memory (W18) Revision History Date Revision 09/13/00 -001 Initial Release Deleted 16-Mbit density Revised ADV#, Section 2.2 Revised Protection Registers, Section 4.16 Revised Program Protection Register, Section 4.18 Revised Example in First Access Latency Count, Section 5.0.2 ...

  • Page 6

    Date Revision Various text edits Updated Latency Count Section, including adding Latency Count Tables 10/10/02 -005 Added section 8.4 WAIT Function and WAIT Summary Table Updated Package Drawing and Dimensions 11/12/02 -006 Various text clarifications Removed Numonyx Burst Order 01/14/03 ...

  • Page 7

    Numonyx™ Wireless Flash Memory (W18) 1.0 Introduction This datasheet contains information about the Numonyx™ Wireless Flash Memory (W18) device family. This section describes nomenclature used in the datasheet. Section 2.0 provides an overview of the W18 flash memory device. Section ...

  • Page 8

    Conventions Table 2: Conventions Refers to the full V CC “1.8 V” ±5%. Set Refers to registers means the bit is a logical 1 and cleared means the bit is a logical 0. Often used interchangeably to refer to ...

  • Page 9

    Numonyx™ Wireless Flash Memory (W18) 2.0 Functional Overview This section provides an overview of the W18 device features and architecture. The W18 device provides Read-While-Write (RWW) and Read-White-Erase (RWE) capability with high-performance synchronous and asynchronous reads on package- compatible densities ...

  • Page 10

    An internal Status Register provides ready/busy indication results of the operation (success, fail, and so on). Three power-saving features– Automatic Power Savings (APS), standby, and RST# – can significantly reduce ...

  • Page 11

    Numonyx™ Wireless Flash Memory (W18) Table 3: Bottom Parameter Memory Map Size Blk # (KW 100000-107FFF 0C0000-0C7FFF 32 30 0B8000-0BFFFF 32 23 080000-087FFF 32 22 078000-07FFFF 32 15 ...

  • Page 12

    Table 4: Top Parameter Memory Map Size Blk # (KW 1FF000-1FFFFF 4 63 1F8000-1F8FFF 32 62 1F0000-1F7FFF 32 56 1C0000-1C7FFF 32 55 1B8000-1BFFFF 178000-17FFFF 32 40 140000-147FFF 32 39 138000-13FFFF 32 32 100000-107FFF 32 ...

  • Page 13

    Numonyx™ Wireless Flash Memory (W18) 3.0 Package Information 3.1 W18 — Lithography Figure 1: 32- and 64-Mbit VF BGA Package Drawing Ball A1 Corner Top ...

  • Page 14

    W18 — 130 nm Figure 2: 32-, 64-, and 128-Mbit VF BGA Package Drawing Ball A1 Corner Top View - Bump Side Down A1 A2 ...

  • Page 15

    Numonyx™ Wireless Flash Memory (W18) Figure 3: 128-Mbit QUAD+ Package Drawing A1 Index Mark Top View - Ball Down A2 Dimensions Package Height Ball ...

  • Page 16

    Ballout and Signal Descriptions 4.1 Signal Ballout The W18 device is available in a 56-ball VF BGA and µBGA Chip Scale Package with 0.75 mm ball pitch, or the 88-ball (80 active balls) QUAD+ SCSP package. shows the device ...

  • Page 17

    Numonyx™ Wireless Flash Memory (W18) Figure 5: 88-Ball (80 Active Balls) QUAD+ Ballout Legend: Notes: 1. Unused upper address balls can be treated as NC; for example, 128-Mbit ...

  • Page 18

    Signal Descriptions Table 7 describes the signals used on the VF BGA package. signals used on the QUAD+ package. Table 7: Signal Descriptions - VF BGA Package Symbol Type A[22:0] Input ADDRESS INPUTS: For memory addresses. 32-Mbit: A[20:0]; 64-Mbit: ...

  • Page 19

    Numonyx™ Wireless Flash Memory (W18) Table 8: Signal Descriptions - QUAD+ Package (Sheet Symbol Type ADDRESS INPUTS: Inputs for all die addresses during read and write operations. —256-Mbit Die : AMAX= A23 —128-Mbit Die : AMAX = ...

  • Page 20

    Table 8: Signal Descriptions - QUAD+ Package (Sheet WAIT: Output signal. Indicates invalid data during synchronous array or non-array flash reads. Read Configuration Register bit 10 (RCR[10]) determines WAIT-asserted polarity (high or low). WAIT is High-Z if ...

  • Page 21

    Numonyx™ Wireless Flash Memory (W18) 5.0 Maximum Ratings and Operating Conditions 5.1 Absolute Maximum Ratings Warning: Stressing the device beyond the “Absolute Maximum Ratings” may cause permanent damage. These are stress ratings only. Notice: This datasheet contains information on products ...

  • Page 22

    Table 10: Extended Temperature Operation (Sheet Symbol Parameter Main and Parameter Blocks Block Erase Main Blocks Cycles Parameter Blocks Notes: 1. VPP is normally V . VPP can be connected to 11.4 V–12.6 V for 1000 cycles ...

  • Page 23

    Numonyx™ Wireless Flash Memory (W18) 6.0 Electrical Specifications 6.1 DC Current Characteristics Note: Specifications are for 130 nm and 90 nm devices unless otherwise stated; the 128 Mbit density is supported ONLY on 90 nm. Table 11: DC Current Characteristics ...

  • Page 24

    Table 11: DC Current Characteristics (Sheet (1) Symbol Parameter 130nm I CCWS V Program Suspend CC 90nm I CCWS 130nm I CCES V Erase Suspend CC 90nm I CCWS V Standby I PP PPS V Program Suspend ...

  • Page 25

    Numonyx™ Wireless Flash Memory (W18) Table 12: DC Voltage Characteristics (Sheet Symbol Parameter V Output High V OH CCQ V V Lock-Out PPLK PP V Lock (130nm LKO V Lock (90nm Lock ...

  • Page 26

    AC Characteristics Table 13: Read Operations — (Sheet Symbol Asynchronous Specifications R1 t Read Cycle Time AVAV R2 t Address to Output Valid AVQV R3 t CE# Low to Output Valid ELQV R4 ...

  • Page 27

    Numonyx™ Wireless Flash Memory (W18) Table 13: Read Operations — (Sheet Symbol Synchronous Specifications R301 t Address Valid Setup to CLK AVCH R302 t ADV# Low Setup to CLK VLCH R303 t CE# Low ...

  • Page 28

    Table 14: Read Operations — 130 nm (Sheet R101 t Address Setup to ADV# High AVVH R102 t CE# Low to ADV# High ELVH R103 t ADV# Low to Output Valid VLQV R104 t ADV# Pulse ...

  • Page 29

    Numonyx™ Wireless Flash Memory (W18) Figure 6: Asynchronous Read Operation Waveform V IH Address [ CE# [ OE# [ WE# [ High Z WAIT ...

  • Page 30

    Figure 7: Latched Asynchronous Read Operation Waveform V IH Valid A[MAX:2] [A] Address A[1:0] [ R101 R105 V IH ADV# [ R104 V IH CE# [ R102 V IH OE# ...

  • Page 31

    Numonyx™ Wireless Flash Memory (W18) Figure 8: Page-Mode Read Operation Waveform V IH Valid A[MAX:2] [A] Address A[1:0] [ R101 R105 V IH ADV# [ R104 V IH CE# [ ...

  • Page 32

    Figure 9: Single Synchronous Read-Array Operation Waveform R12 Notes: Section 14.2, “First Access Latency Count (RCR[13:11])” on page 79 1. cycles during the initial access. 2. WAIT (shown asserted; RCR[10]=0) can be configured to assert either during, or one data ...

  • Page 33

    Numonyx™ Wireless Flash Memory (W18) Figure 10: Synchronous 4-Word Burst Read Operation Waveform R12 Notes: Section 14.2, “First Access Latency Count (RCR[13:11])” on page 79 1. cycles during the initial access. 2. WAIT (shown asserted; RCR[10 can be ...

  • Page 34

    Figure 11: WAIT Functionality for EOWL (End-of-Word Line) Condition Waveform R12 Notes: Section 14.2, “First Access Latency Count (RCR[13:11])” on page 79 1. cycles during the initial access. 2. WAIT (shown asserted; RCR[10]=0) can be configured to assert either during, ...

  • Page 35

    Numonyx™ Wireless Flash Memory (W18) Figure 12: WAIT Signal in Synchronous Non-Read Array Operation Waveform R12 Notes: Section 14.2, “First Access Latency Count (RCR[13:11])” on page 79 1. cycles during the initial access. 2. WAIT shown asserted (RCR[10]=0). November 2007 ...

  • Page 36

    Figure 13: Burst Suspend CLK R2 Address [A] R101 R105 R105 R106 ADV# R3 CE# [E] OE# [G] R12 WAIT [T] WE# [W] R6 DATA [D/Q] Note: During Burst Suspend, Clock signal can be held high or low. 7.1 AC ...

  • Page 37

    Numonyx™ Wireless Flash Memory (W18) Table 15: AC Write Characteristics — (Sheet Sym W13 WP# Setup to WE# (CE#) High BHWH BHEH W14 Write Recovery before Read WHGL ...

  • Page 38

    Table 16: AC Write Characteristics — 130 nm (Sheet Sym W13 WP# Setup to WE# (CE#) High BHWH BHEH W14 Write Recovery before Read WHGL EHGL W16 t WE# High ...

  • Page 39

    Numonyx™ Wireless Flash Memory (W18) Figure 14: Write Operations Waveform V IH CLK [ Note 1 Note Valid Address [A] Address R101 R105 V IH ADV# [ R104 V IH ...

  • Page 40

    Figure 15: Asynchronous Read to Write Operation Waveform Address [A] CE# [E} OE# [G] WE# [W] Data [D/Q] R5 RST# [P] Figure 16: Asynchronous Write to Read Operation Address [A] W2 CE# [E} WE# [W] OE# [G] Data [D/Q] W1 ...

  • Page 41

    Numonyx™ Wireless Flash Memory (W18) Figure 17: Synchronous Read to Write Operation R301 R302 R306 CLK [C] R2 R101 Address [A] R105 R105 R106 R102 ADV# [V] R303 R3 CE# [E] OE# [G] WE# R12 WAIT [T] Data [D/Q] November ...

  • Page 42

    Figure 18: Synchronous Write To Read Operation CLK W5 Address [A] ADV# W2 CE# [ WE# [W] OE WAIT [T ] Data [D RST# [P] 7.2 Erase and Program Times Note: Specifications are for ...

  • Page 43

    Numonyx™ Wireless Flash Memory (W18) Table 17: Erase and Program Times (Sheet Operation Symbol Parameter W400 tEFP/W Program W401 tEFP/PB W402 tEFP/MB W403 t EFP/SETUP Operation W404 t EFP/TRAN Latency W405 t EFP/VERIFY Notes: 1. Unless noted ...

  • Page 44

    Figure 19: Reset Operations Waveforms (A) Reset during read mode (B) Reset during program or block erase P1 ≤ P2 (C) Reset during program or block erase P1 ≥ P2 (D) VCC Power-up to RST# high 7.4 AC I/O Test ...

  • Page 45

    Numonyx™ Wireless Flash Memory (W18) Table 19: Test Configuration Component Values for Worst Case Speed Conditions Test Configuration V Min (1.7 V) Standard Test CCQ Note: C includes jig capacitance. L Figure 22: Clock Input AC Waveform CLK [C] 7.5 ...

  • Page 46

    Power and Reset Specifications Numonyx™ Wireless Flash Memory (W18) devices have a layered approach to power savings that can significantly reduce overall system power consumption. The APS feature reduces power consumption when the device is selected but idle. If ...

  • Page 47

    Numonyx™ Wireless Flash Memory (W18) will not occur because the flash memory may be providing status information instead of array data. To allow proper CPU/flash initialization at system reset, connect RST# to the system CPU RESET# signal. System designers must ...

  • Page 48

    Bus Operations Overview This section provides an overview of device bus operations. The Numonyx™ Wireless Flash Memory (W18) family includes an on-chip WSM to manage block erase and program algorithms. Its Command User Interface (CUI) allows minimal processor overhead ...

  • Page 49

    Numonyx™ Wireless Flash Memory (W18) • CFI Query: Returns Common Flash Interface (CFI) information. CFI information can be accessed starting at 4-Mbit partition base addresses. • Read Status Register: Returns Status Register (SR) data from the addressed partition. The appropriate ...

  • Page 50

    Standby De-asserting CE# deselects the device and places it in standby mode, substantially reducing device power consumption. In standby mode, outputs are placed in a high- impedance state independent of OE#. If deselected during a program or erase algorithm, ...

  • Page 51

    Numonyx™ Wireless Flash Memory (W18) Table 22: Command Codes and Descriptions (Sheet Device Operation Code Command FFh Read Array Read Status 70h Register Read 90h Read Identifier 98h CFI Query Clear Status 50h Register Word Program 40h ...

  • Page 52

    Table 22: Command Codes and Descriptions (Sheet Device Operation Code Command Protection Protection C0h Program Setup Configuration 60h Setup Configuration Set 03h Configuration Register Note: Do not use unassigned commands. Numonyx reserves the right to redefine these ...

  • Page 53

    Numonyx™ Wireless Flash Memory (W18) Table 23: Bus Cycle Definitions Operation Command Protection Program Protection Lock Protection Program Configuration Set Configuration Register Notes: 1. First-cycle command addresses should be the same as the operation’s target address. Examples: the first-cycle address ...

  • Page 54

    Figure 23: Normal Write and Read Cycles Address [A] WE# [W] OE# [G] Data [Q] Figure 24: Interleaving a 2-Cycle Write Sequence with an Array Read Address [A] WE# [W] OE# [G] Data [Q] By contrast, a write bus cycle ...

  • Page 55

    Numonyx™ Wireless Flash Memory (W18) 10.0 Read Operations The device supports two read modes - asynchronous page and synchronous burst mode. Asynchronous page mode is the default read mode after device power- reset. The Read Configuration Register (RCR) ...

  • Page 56

    CLK edges following a minimum delay. However, for a synchronous non- array read, the same word of data will be output on successive clock edges until the burst length requirements are satisfied. See During synchronous read operations, ...

  • Page 57

    Numonyx™ Wireless Flash Memory (W18) Table 24: Device Identification Codes (Sheet Item Protection Register Lock Status Protection Register Notes: 1. The address is constructed from a base address plus an offset. For example, to read the Block ...

  • Page 58

    Table 26: Status Register Descriptions Bit Name DWS 0 = Device WSM is Busy 7 Device WSM Status 1 = Device WSM is Ready ESS 0 = Erase in progress/completed 6 Erase Suspend Status 1 = Erase suspended ES 0 ...

  • Page 59

    Numonyx™ Wireless Flash Memory (W18) 11.0 Program Operations 11.1 Word Program When the Word Program command is issued, the WSM executes a sequence of internally timed events to program a word at the desired address and verify that the bits ...

  • Page 60

    Figure 26: Word Program Flowchart Start Write 40h, Word Address Write Data Word Address Read Status Register 0 SR[ Full Program Status Check (if desired) Program Complete Read Status Register 1 SR[ SR[ ...

  • Page 61

    Numonyx™ Wireless Flash Memory (W18) The 12-V V mode enhances programming performance during the short time period PP typically found in manufacturing processes; however not intended for extended use.12 V may be applied to V Section 5.0, “Maximum ...

  • Page 62

    Setup After receiving the EFP Setup (30h) and EFP Confirm (D0h) command sequence, SR[7] transitions from indicating that the WSM is busy with EFP algorithm startup. A delay before checking SR[7] is required to ...

  • Page 63

    Numonyx™ Wireless Flash Memory (W18) 11.3.5 Exit SR[7]=1 indicates that the device has returned to normal operating conditions. A full status check should be performed at this time to ensure the entire block programmed successfully. After EFP exit, any valid ...

  • Page 64

    Figure 27: Enhanced Factory Program Flowchart EFP Setup Start V = 12V PP SR[0]=1=N Unlock Block Write 30h Address = WA 0 Write D0h Address = WA 0 EFP setup time Read Status Register EFP Setup Done? SR[7]=1=N Check V ...

  • Page 65

    Numonyx™ Wireless Flash Memory (W18) 12.0 Program and Erase Operations 12.1 Program/Erase Suspend and Resume The Program Suspend and Erase Suspend commands halt an in-progress program or erase operation. The command can be issued at any device address. The partition ...

  • Page 66

    Figure 28: Program Suspend / Resume Flowchart Start Program Suspend Write B0h Any Address Read Status Write 70h Same Partition Read Status Register Read Array Write FFh Susp Partition Read Array Data ...

  • Page 67

    Numonyx™ Wireless Flash Memory (W18) Figure 29: Erase Suspend / Resume Flowchart Start Erase Write B0h Any Address Read Write 70h Same Partition Read Status Register SR.7 = SR.6 = Read Read or Program? Read Array Data Done? Erase Write ...

  • Page 68

    The 2-cycle erase sequence cannot be interrupted with a bus write operation. For example, an Erase Setup command must be immediately followed by the Erase Confirm command in order to execute properly different command is issued between the ...

  • Page 69

    Numonyx™ Wireless Flash Memory (W18) Figure 30: Block Erase Flowchart Start Write 20h Block Address Write D0h and Block Address Read Status Register 0 SR[ Full Erase Status Check (if desired) Block Erase Complete Read Status Register 1 ...

  • Page 70

    The product does not support simultaneous program and erase operations. Attempting to perform operations such as these results in a command sequence error. Only one partition can be programming or erasing while another partition is reading. However, one partition may ...

  • Page 71

    Numonyx™ Wireless Flash Memory (W18) 13.0 Security Modes The Numonyx Wireless Flash Memory (W18) offers both hardware and software security features to protect the flash data. The software security feature is used by executing the Lock Block command. The hardware ...

  • Page 72

    Figure 31: Block Locking State Diagram Power-Up/Reset Notes: 13.1.1 Lock All blocks default to locked (state [x01]) after initial power-up or reset. Locked blocks are fully protected from alteration. Attempted program or erase operations to a locked block will return ...

  • Page 73

    Numonyx™ Wireless Flash Memory (W18) 13.1.4 Block Lock Status Every block’s lock status can be read in read identifier mode. To enter this mode, issue the Read Identifier command to the device. Subsequent reads at BBA + 02h will output ...

  • Page 74

    WP# Lock-Down Control The Write Protect signal, WP#, adds an additional layer of block security. WP# only affects blocks that once had the Lock-Down command written to them. After the lock- down status bit is set for a block, ...

  • Page 75

    Numonyx™ Wireless Flash Memory (W18) The protection register shares some of the same internal flash resources as the parameter partition. Therefore, RWW is only allowed between the protection register and main partitions. register, parameter partition, and main partition during RWW ...

  • Page 76

    Figure 33: Protection Register Programming Flowchart Start Write C0h Addr=Prot addr Write Protect. Register Address / Data Read Status Register No SR[ Yes Full Status Check (if desired) Program Complete Read SRD 1,1 SR[4:3] = 1,0 SR[4,1] = ...

  • Page 77

    Numonyx™ Wireless Flash Memory (W18) Figure 34: Protection Register Locking 13.3 VPP Protection The Numonyx™ Wireless Flash Memory (W18) provides in-system program and erase For factory programming, it also includes a low-cost, backward-compatible PP1 12 V programming ...

  • Page 78

    Set Read Configuration Register The Set Read Configuration Register (RCR) command sets the burst order, frequency configuration, burst length, and other parameters. A two-bus cycle command sequence initiates this operation. The Read Configuration Register data is placed on the ...

  • Page 79

    Numonyx™ Wireless Flash Memory (W18) Table 31: Read Configuration Register Descriptions (Sheet Bit Name BW 3 Burst Wrap BL[2:0] 2-0 Burst Length Notes: 1. Undocumented combinations of bits are reserved by Numonyx for future implementations. 2. Synchronous ...

  • Page 80

    Figure 37: Word Boundary Word Note: The 16-word boundary is the end of the device sense word-line. 14.2.1 Latency Count Settings Table 32: Latency Count Setting for V Latency Count Settings Frequency Support RCR bits[9:8] must ...

  • Page 81

    Numonyx™ Wireless Flash Memory (W18) Figure 38: Example: Latency Count Setting at 3 CLK (C) CE# (E) ADV# (V) A (A) MAX-0 DQ (D/Q) 15-0 14.3 WAIT Signal Polarity (RCR[10]) If the WAIT bit is cleared (RCR[10]=0), then WAIT is ...

  • Page 82

    Table 34: WAIT Signal Conditions CONDITION CE CE OE# Synchronous Array Read Synchronous Non-Array Read All Asynchronous Read and all Write 14.5 Data Hold (RCR[9]) The Data Output Configuration (DOC) bit (RCR[9]) determines whether ...

  • Page 83

    Numonyx™ Wireless Flash Memory (W18) Figure 39: Data Output Configuration with WAIT Signal Delay CLK [C] WAIT (CR WAIT (CR CLK DQ [Q] Data Hold 15-0 WAIT (CR WAIT (CR ...

  • Page 84

    Table 35: Sequence and Burst Length 4-Word Burst RCR[2:0]=001b Linear 0 0-1-2-3 1 1-2-3-0 2 2-3-0-1 3 3-0-1 0-1-2-3 1 1-2-3-4 2 2-3-4-5 3 3-4-5 14.8 Clock ...

  • Page 85

    Numonyx™ Wireless Flash Memory (W18) If RCR[3]=1 (no-wrap mode) and RCR[2: (4-word burst length), then possible linear burst sequences are 0-1-2-3, 1-2-3-4, 2-3-4-5, and 3-4-5-6. RCR[3]=1 not only enables limited non-aligned sequential bursts, but also reduces power by ...

  • Page 86

    Appendix A Write State Machine States This table shows the command state transitions based on incoming commands. Only one partition can be actively programming or erasing at a time. Figure 40: Write State Machine — Next State Table (Sheet 1 ...

  • Page 87

    Numonyx™ Wireless Flash Memory (W18) Figure 40: Write State Machine — Next State Table (Sheet ...

  • Page 88

    All partitions default to Read Array mode at power-up. A Read Array command issued to a busy partition results in undermined data when a partition address is read. 4. Both cycles of 2 cycles commands should be issued to ...

  • Page 89

    Numonyx™ Wireless Flash Memory (W18) Appendix B Common Flash Interface (CFI) This appendix defines the data structure or “database” returned by the Common Flash Interface (CFI) Query command. System software should parse this structure to gain critical information such as ...

  • Page 90

    Table 37: Example of Query Structure Output of x16 Device Word Addressing Offset Hex Code 00010h 0051 00011h 0052 00012h 0059 00013h 00014h 00015h P LO 00016h ...

  • Page 91

    Numonyx™ Wireless Flash Memory (W18) Table 39: Block Status Register Offset Length (1) (BA+2)h 1 Notes Block Address beginning location (i.e., 08000h is block 1’s beginning location when the block size is 32K-word). B.4 CFI Query Identification ...

  • Page 92

    Table 40: CFI Identification Offset Length 10h 3 Query-unique ASCII string “QRY” Primary vendor command set and control interface ID code. 13h 2 16-bit ID code for vendor-specific algorithms. 15h 2 Extended Query Table primary algorithm address Alternate vendor command ...

  • Page 93

    Numonyx™ Wireless Flash Memory (W18) B.5 Device Geometry Definition Table 42: Device Geometry Definition Offset Length 27h 1 28h 2 2Ah 2 2Ch 1 4 2Dh 31h 4 35h 4 Address 27: 28: 29: 2A: 2B: 2C: 2D: 2E: 2F: ...

  • Page 94

    B.6 Numonyx-Specific Extended Query Table Table 43: Primary Vendor-Specific Extended Query (1) Length Offset P = 39h (P+0)h 3 (P+1)h (P+2)h (P+3)h 1 (P+4)h 1 (P+5)h 4 (P+6)h (P+7)h (P+8)h (P+9)h 1 (P+A)h 2 (P+B)h (P+C)h 1 (P+D)h 1 Datasheet ...

  • Page 95

    Numonyx™ Wireless Flash Memory (W18) Table 44: Protection Register Information Offset Length P = 39h (Optional Flash Features and Commands) Number of Protectuib Register fields in JEDEC ID space E)h 1 “00h” indicates that 256 protection fields are ...

  • Page 96

    Table 46: Partition and Erase-block Region Information (1) Offset P = 39h Bottom Top (P+19)h (P+19)h Datasheet 96 Description (Optional flash features and commands) Number of device hardware-partition regions within the device single hardware partition device ...

  • Page 97

    Numonyx™ Wireless Flash Memory (W18) Table 47: Partition Region 1 Information (1) Offset P = 39h Bottom Top (P+1A)h (P+1A)h Number of identical partitions within the partition region (P+1B)h (P+1B)h (P+1C)h (P+1C)h Number of program or erase operations allowed in ...

  • Page 98

    Table 48: Partition and Erase Block Region Information Address 52: 53: 54: 55: 56: 57: 58: 59: 5A: 5B: 5C: 5D: 5E: 5F: 60: 61: 62: 63: 64: 65: 66: 67: 68: 69: 6A: 6B: 6C: 6D: 6E: 6F: 70: ...

  • Page 99

    Numonyx™ Wireless Flash Memory (W18) Appendix C Ordering Information To order samples, obtain datasheets or inquire about any stack combination, please contact your local Numonyx representative. Table 49: 38F Type Stacked Components PF 38F 5070 Product Die/ Package Product Line ...

  • Page 100

    Table 50: 48F Type Stacked Components PC 48F 4400 Product Die/ Package Product Line Density Designator Designator Configuration PC = Char 1 = Flash Easy BGA, die #1 RoHS Char 2 = Flash RC = die #2 Easy BGA, Leaded ...

  • Page 101

    Numonyx™ Wireless Flash Memory (W18) Table 52: NOR Flash Family Decoder Code Family C C3 J3v L18 / L30 M M18 P P30 / P33 W W18 / W30 0(zero) - Table 53: Voltage / NOR Flash CE# ...

  • Page 102

    Table 54: Parameter / Mux Configuration Decoder Code, Mux Number of Flash Die Identification Non Mux Mux "Full" Mux Only Flash is Muxed and RAM ...

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