K4T1G164QE-HCE6000 Samsung Semiconductor, K4T1G164QE-HCE6000 Datasheet - Page 41

• Manufacturer Part Number: K4T1G164QE-HCE6000
• Manufacturer: Samsung Semiconductor
• Type: DDR2 SDRAMr

Specifications of K4T1G164QE-HCE6000

• Organization: 64Mx16
• Density: 1Gb
• Address Bus: 16b
• Access Time (max): 450ps
• Maximum Clock Rate: 667MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: FBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 115mA
• Pin Count: 84
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

20. Input waveform timing tDS with differential data strobe enabled MR[bit10]=0, is referenced from the input signal crossing at the V
21. Input waveform timing tDH with differential data strobe enabled MR[bit10]=0, is referenced from the differential data strobe crosspoint to the input signal crossing
22. Input waveform timing is referenced from the input signal crossing at the V
23. Input waveform timing is referenced from the input signal crossing at the V
K4T1G084QE
K4T1G164QE
K4T1G044QE
under test. See Figure 19.
under test. See Figure 19.
data strobe crosspoint for a rising signal, and from the input signal crossing at the V
to the device under test. DQS, DQS signals must be monotonic between V
at the V
the device under test. DQS, DQS signals must be monotonic between V
IH
(DC) level for a falling signal and from the differential data strobe crosspoint to the input signal crossing at the V
CK
CK
DQS
DQS
Figure 19 - Differential input waveform timing - tIS and tIH
Figure 18 - Differential input waveform timing - tDS and tDH
tIS
tDS
tIH
tDH
41 of 45
IL
(DC)max and V
IL
(DC)max and V
IH
IL
(DC) level for a rising signal and V
(AC) level for a rising signal and V
tDS
IL
tIS
(AC) level to the differential data strobe crosspoint for a falling signal applied
IH
(DC)min. See Figure 18.
tDH
IH
(DC)min. See Figure 18.
tIH
V
V
V
V
V
V
V
IH
IL
DDQ
IH
IH
REF
IL
IL
SS
V
V
V
V
V
V
V
(AC) for a falling signal applied to the device
(DC) for a falling signal applied to the device
(DC)max
(AC)max
(AC)min
(DC)min
DDQ
IH
IH
REF
IL
IL
SS
(DC)
(DC)max
(AC)max
(AC)min
(DC)min
Rev. 1.1 December 2008
IL
(DC)
(DC) level for a rising signal applied to
DDR2 SDRAM
IH
(AC) level to the differential