MT41J256M8HX-15E:D Micron Technology Inc, MT41J256M8HX-15E:D Datasheet - Page 159

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MT41J256M8HX-15E:D

Manufacturer Part Number
MT41J256M8HX-15E:D
Description
MICMT41J256M8HX-15E:D 2GB:X4,X8,X16 DDR3
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Series
-r
Datasheets

Specifications of MT41J256M8HX-15E:D

Organization
256Mx8
Address Bus
18b
Maximum Clock Rate
1.333GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
165mA
Pin Count
78
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Format - Memory
RAM
Memory Type
DDR3 SDRAM
Memory Size
2G (256M x 8)
Speed
667MHz
Interface
Parallel
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 95°C
Package / Case
78-TFBGA
Lead Free Status / RoHS Status
Compliant

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Figure 104: MRS Command to Power-Down Entry
Figure 105: Power-Down Exit to Refresh to Power-Down Entry
RESET
PDF: 09005aef826aaadc/Source: 09005aef82a357c3
DDR3_D4.fm - Rev G 2/09 EN
Command
Command
Address
CK#
CKE
CKE
CK
CK#
CK
NOP
T0
Valid
MRS
T0
Notes:
t CK
t CK
Enter power-down
t IS
mode
1.
2.
The RESET signal (RESET#) is an asynchronous signal that triggers any time it drops
LOW, and there are no restrictions about when it can go LOW. After RESET# goes LOW, it
must remain LOW for 100ns. During this time, the outputs are disabled, ODT (R
off (High-Z), and the DRAM resets itself. CKE should be brought LOW prior to RESET#
being driven HIGH. After RESET# goes HIGH, the DRAM must be reinitialized as though
a normal power up were executed (see Figure 106 on page 160). All refresh counters on
the DRAM are reset, and data stored in the DRAM is assumed unknown after RESET# has
gone LOW.
NOP
NOP
T1
T1
t
t
next power-down can be entered.
t CH
XP must be satisfied before issuing the command.
XPDLL must be satisfied (referenced to the registration of power-down exit) before the
t CH
t CPDED
t CL
t CL
t MRSPDEN
NOP
NOP
T2
T2
t PD
NOP
T3
Ta0
t IH
159
Exit power-down
t IS
t IS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
mode
NOP
NOP
Ta1
T4
t CPDED
t XP 1
2Gb: x4, x8, x16 DDR3 SDRAM
REFRESH
NOP
Ta2
Ta0
t XPDLL 2
Indicates a Break in
Time Scale
Indicates a Break in
Time Scale
©2006 Micron Technology, Inc. All rights reserved.
t PD
Ta3
NOP
Ta1
Operations
Enter power-down
TT
Don’t Care
Ta4
mode
NOP
Don’t Care
Tb0
) turns

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