MT41J256M8HX-15E:D Micron Technology Inc, MT41J256M8HX-15E:D Datasheet - Page 46

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MT41J256M8HX-15E:D

Manufacturer Part Number
MT41J256M8HX-15E:D
Description
MICMT41J256M8HX-15E:D 2GB:X4,X8,X16 DDR3
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Series
-r
Datasheets

Specifications of MT41J256M8HX-15E:D

Organization
256Mx8
Address Bus
18b
Maximum Clock Rate
1.333GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
165mA
Pin Count
78
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Format - Memory
RAM
Memory Type
DDR3 SDRAM
Memory Size
2G (256M x 8)
Speed
667MHz
Interface
Parallel
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 95°C
Package / Case
78-TFBGA
Lead Free Status / RoHS Status
Compliant

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Table 28:
Figure 16:
PDF: 09005aef826aaadc/Source: 09005aef82a357c3
DDR3_D3.fm - Rev G 2/09 EN
Parameter/Condition
Differential input voltage logic high - slew
Differential input voltage logic low - slew
Differential input voltage logic high
Differential input voltage logic low
Differential input crossing voltage relative
to V
Differential input crossing voltage relative
to V
Single-ended high level for strobes
Single-ended high level for CK, CK#
Single-ended low level for strobes
Single-ended low level for CK, CK#
DD
DD
/2 for DQS, DQS#; CK, CK#
/2 for CK, CK#
Differential Input Operating Conditions (CK, CK# and DQS, DQS#)
Vix for Differential Signals
Notes:
1. Clock is referenced to V
2. Reference is V
3. Differential input slew rate = 2 V/ns
4. Defines slewrate reference points, relative to input crossing voltages.
5. MAX limit is relative to single-ended signals, the overshoot specifications are applicable.
6. MIN limit is relative to single-ended signals, the undershoot specifications are applicable.
7. The typical value of V
8. The V
Vdd/2, Vddq/2
Vdd, Vddq
CK#, DQS#
and V
ferential input signals must cross.
is only allowed when the following conditions are met: The single-ended input signals are
monotonic, have the single-ended swing V
ferential slew rate of CK, CK# is greater than 3 V/ns.
Vss, Vssq
CK, DQS
IX
IX
(
extended range (±175mV) is allowed only for the clock, and this V
AC
) is expected to track variations in V
V
V
REF
X
IHDIFF
ILDIFF
V
V
V
Symbol
CA(
IHDIFF
ILDIFF
IX
V
V
V
(
(
SHE
(175)
SEL
DC
AC
AC
IX
IX
(
(
AC
) for clock and for V
)slew
)slew
AC
(
DD
AC
Vix
)
)
) is expected to be about 0.5 × V
and V
46
X
2 × (V
V
SS
V
DD
V
V
. Data strobe is referenced to V
DD
REF
REF
Q/2 + V
V
/2 + V
SS
IH
(
(
+200
V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Min
DC
DC
n/a
V
/V
SS
(
Electrical Specifications – DC and AC
AC
SS
) - 150
) - 175
Q
SS
REF
SEL
)-V
IH
Q
IH
(
AC
DQ(
, V
(
REF
DD
AC
X
)
SEH
)
)
. V
2Gb: x4, x8, x16 DDR3 SDRAM
DC
IX
) for strobe.
of at least V
(
AC
2 × (V
V
) indicates the voltage at which dif-
V
V
V
DD
Vix
REF
REF
DD
V
DD
Q/2 - V
DD
/2 - V
REF
(
(
V
Max
–200
DC
DC
V
n/a
of the transmitting device,
DD
/V
X
DD
) + 150
) + 175
- V
©2006 Micron Technology, Inc. All rights reserved.
DD
DD
Q
IL
DD
IL
IL
/2 ±250mV, and the dif-
Q
(
AC
(
(
Q and V
AC
AC
)
)
))
IX
extended range
Units
SS
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
Q.
CK#, DQS#
Vdd/2, Vddq/2
CK, DQS
Vdd, Vddq
Vix
Vix
Vss, Vssq
Notes
7, 8
4
4
5
6
7
5
5
6
6

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