K4S280832E-TC75 Samsung Semiconductor, K4S280832E-TC75 Datasheet
K4S280832E-TC75
Specifications of K4S280832E-TC75
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K4S280832E-TC75 Summary of contents
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... SDRAM 128Mb E-die (x4, x8, x16) 128Mb E-die SDRAM Specification * Samsung Electronics reserves the right to change products or specification without notice. Revision 1.4 February 2004 CMOS SDRAM Rev. 1.4 February. 2004 ...
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... SDRAM 128Mb E-die (x4, x8, x16) Revision History Revision 1.0 (November, 2002) - First release. Revision 1.1 (April, 2003) - x4/x8/x16 Merged spec. Revision 1.2 (May, 2003) - Delete -TC(L)7C Revision 1.3 (January, 2004) - Modified ICC4 current from 110mA -> 140mA at x16 - Modified tSH from 0.8ns -> 1.0ns at 166MHz. ...
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... Cycle) GENERAL DESCRIPTION The K4S280432E / K4S280832E / K4S281632E is 134,217,728 bits synchronous high data rate Dynamic RAM organized 8,388,608 words by 4 bits / 4 x 4,194,304 words by 8 bits / 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG′s high perfor- mance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle ...
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... SDRAM 128Mb E-die (x4, x8, x16) Package Physical Dimension #54 #1 0.10 MAX 0.004 0. 0.028 #28 #27 22.62 MAX 0.891 22.22 ± 0.10 ± 0.004 0.875 0.008 +0.10 0.30 0.80 -0.05 +0.004 0.0315 0.012 -0.002 54Pin TSOP Package Dimension CMOS SDRAM 0~8°C 0.25 TYP 0 ...
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... SDRAM 128Mb E-die (x4, x8, x16) FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR CLK CKE * Samsung Electronics reserves the right to change products or specification without notice. Data Input Register Column Decoder Latency & Burst Length Programming Register LWE LCAS Timing Register ...
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... SDRAM 128Mb E-die (x4, x8, x16) PIN CONFIGURATION (Top view) x8 x16 DQ0 DQ0 V V DDQ DDQ DQ1 N.C DQ2 DQ1 V V SSQ SSQ DQ3 N.C DQ4 DQ2 V V DDQ DDQ DQ5 N.C DQ6 DQ3 V V SSQ SSQ DQ7 N LDQM N CAS CAS RAS ...
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... SDRAM 128Mb E-die (x4, x8, x16) ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on V supply relative to Vss DD Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. ...
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... SDRAM 128Mb E-die (x4, x8, x16) DC CHARACTERISTICS (x4, x8) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active) I CC2 Precharge standby current in PS CKE & CLK ≤ V power-down mode I CC2 I CC2 Precharge standby current in non power-down mode I NS ...
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... SDRAM 128Mb E-die (x4, x8, x16) DC CHARACTERISTICS (x16) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active) I CC2 Precharge standby current in PS CKE & CLK ≤ V power-down mode I CC2 I CC2 Precharge standby current in non power-down mode I NS ...
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... SDRAM 128Mb E-die (x4, x8, x16) AC OPERATING TEST CONDITIONS Parameter Input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition Output 870Ω (Fig output load circuit OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) ...
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... SDRAM 128Mb E-die (x4, x8, x16) AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter Symbol CAS latency=3 CLK cycle time CAS latency=2 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=3 Output data hold time CAS latency=2 CLK high pulse width CLK low pulse width ...
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... SDRAM 128Mb E-die (x4, x8, x16) IBIS SPECIFICATION I Characteristics (Pull-up) OH 100MHz 100MHz Voltage 133MHz 133MHz Min Max (V) I (mA) I (mA) 3.45 -2.4 3.3 -27.3 3.0 0.0 -74.1 2.6 -21.1 -129.2 2.4 -34.1 -153.3 2.0 -58.7 -197.0 1.8 -67.3 -226.2 1.65 -73.0 -248.0 1.5 -77 ...
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... SDRAM 128Mb E-die (x4, x8, x16) V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) DD 0.0 0.0 0.2 0.0 0.4 0.0 0.6 0.0 0.7 0.0 0.8 0.0 0.9 0.0 1.0 0.23 1.2 1.34 1.4 3.02 1.6 5.06 1.8 7.35 2.0 9.83 2.2 12.48 2.4 15 ...
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... MRS can be issued only at all banks precharge state. A new command can be issued after 2 CLK cycles of MRS. 3. Auto refresh functions are as same as CBR refresh of DRAM. The automatical precharge without row precharge command is meant by "Auto". Auto/self refresh can be issued only at all banks precharge state. ...