5962-8961403MXA E2V, 5962-8961403MXA Datasheet - Page 14

• Manufacturer Part Number: 5962-8961403MXA
• Manufacturer: E2V

Specifications of 5962-8961403MXA

• Lead Free Status / RoHS Status: Supplier Unconfirmed

DSCC FORM 2234
APR 97
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of
MIL-STD-883.
The devices selected for testing shall be programmed with a checkerboard pattern. After completion of all testing, the devices
shall be erased and verified.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
Delta limits shall apply only to subgroup 1 of group C inspection and shall consist of tests specified in table IIB herein.
4.4.2.1 Additional criteria for device class M.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
c.
d.
e.
a.
b.
c.
DEFENSE SUPPLY CENTER COLUMBUS
For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V,
subgroups 7 and 8 shall include verifying the functionality of the device.
O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may
affect the performance of the device. For device class M, procedures and circuits shall be maintained under document
revision level control by the manufacturer and shall be made available to the preparing activity or acquiring activity
upon request. For device classes Q and V, the procedures and circuits shall be under the control of the device
manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the preparing activity or
acquiring activity upon request. Testing shall be on all pins, on five devices with zero failures. Latch-up test shall be
considered destructive. Information contained in JEDEC Standard EIA/JESD78 may be used for reference.
Subgroup 4 (C IN and C OUT measurements) shall be measured only for initial qualification and after any process or
design changes which may affect input or output capacitance. Capacitance shall be measured between the
designated terminal and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures, and all input and
output terminals tested.
Steady-state life test conditions, method 1005 of MIL-STD-883:
(1)
(2)
(3)
(4)
All devices requiring end-point electrical testing shall be programmed with a checkerboard or equivalent alternating bit
pattern.
After the completion of all testing, the devices shall be cleared and verified prior to delivery.
MICROCIRCUIT DRAWING
COLUMBUS, OHIO 43216-5000
The devices selected for testing shall be programmed with a checkerboard pattern or equivalent. After
completion of all testing, the devices shall be erased and verified (except devices submitted for group D testing).
Test condition D or E. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified
in test method 1005.
T
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
A
= +125 C, minimum.
STANDARD
SIZE
A
REVISION LEVEL
F
SHEET
5962-89614
14