MT29F8G08ABABAWP:B Micron Technology Inc, MT29F8G08ABABAWP:B Datasheet - Page 58

• Manufacturer Part Number: MT29F8G08ABABAWP:B
• Manufacturer: Micron Technology Inc

Specifications of MT29F8G08ABABAWP:B

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Figure 37:
PDF: 09005aef8386131b / Source: 09005aef838cad98
m61a_async_sync_nand.fm - Rev. A 2/09 EN
SELECT LUN WITH STATUS (78h) Operation
Writing 78h to the command register, followed by three row address cycles containing
the page, block, and LUN addresses, puts the selected LUN into read status mode
The selected LUN stays in this mode until another valid command is issued. LUNs that
are not addressed are deselected to avoid bus contention.
The selected LUN's status is returned when the host requests data output. The RDY and
ARDY bits of the status register are shared for all of the planes of the selected LUN. The
FAILC and FAIL bits are specific to the plane specified in the row address.
The SELECT LUN WITH STATUS (78h) command also enables the selected LUN for data
output. To begin data output following a READ-series operation after the selected LUN is
ready (RDY = 1), issue the READ MODE (00h) command, then begin data output. If the
host needs to change the cache register that will output data, use the SELECT CACHE
REGISTER (06h-E0h) command after the LUN is ready (see “SELECT CACHE REGISTER
(06h-E0h)” on page 59).
Use of the SELECT LUN WITH STATUS (78h) command is prohibited during the power-
on RESET (FFh) command and when OTP mode is enabled. It is also prohibited
following some of the other RESET, identification, and configuration operations. See
individual operations for specific details.
I/Ox (DQx)
Cycle type
Command
Micron Confidential and Proprietary
78h
8Gb Asychronous/Synchronous NAND Flash Memory
Address
R1
58
Address
R2
Address
Micron Technology, Inc., reserves the right to change products or specifications without notice.
R3
t WHR
D
SR
OUT
Command Definitions
©2008 Micron Technology, Inc. All rights reserved.
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