MT29F8G08ABABAWP:B Micron Technology Inc, MT29F8G08ABABAWP:B Datasheet - Page 64

• Manufacturer Part Number: MT29F8G08ABABAWP:B
• Manufacturer: Micron Technology Inc

Specifications of MT29F8G08ABABAWP:B

• Lead Free Status / RoHS Status: Supplier Unconfirmed

READ PAGE (00h–30h)
Figure 41:
PDF: 09005aef8386131b / Source: 09005aef838cad98
m61a_async_sync_nand.fm - Rev. A 2/09 EN
I/O[7:0] (DQ[7:0])
Cycle type
RDY
READ PAGE (00h–30h) Operation
Command
00h
1. The 00h command is written to the command register.
2. Five address cycles are written to the address registers.
3. A READ PAGE (30h) command is issued.
4. The selected LUN goes busy (RDY = 0, ARDY = 0) for
In devices that have more than one LUN per target, during and following multi-LUN
operations, the SELECT LUN WITH STATUS (78h) command must be used to select only
one LUN prior to issuing the READ MODE (00h) command. This prevents bus conten-
tion.
The READ PAGE (00h–30h) command copies a page from the NAND Flash array to its
respective cache register and enables data output. This command is accepted by the
LUN when it is ready (RDY = 1, ARDY = 1).
A page from the NAND Flash array is read when the following sequence is performed:
To determine the progress of the data transfer, the host can monitor the target's R/B#
signal, or alternatively, the status operations (70h, 78h) can be used. If the status opera-
tions are used to monitor the LUN's status, when the LUN is ready (RDY = 1, ARDY = 1),
the host disables status output and enables data output by issuing the READ MODE
(00h) command. When the host requests data output, output begins at the column
address specified.
During data output the following commands can be used to read and modify the data in
the cache registers: CHANGE READ COLUMN (05h-E0h), CHANGE ROW ADDRESS
(85h).
In devices that have more than one LUN per target, during and following multi-LUN
operations the SELECT LUN WITH STATUS (78h) command must be used to select only
one LUN prior to the issue of the READ MODE (00h) command. This prevents bus
contention.
The READ PAGE (00h-30h) command is used as the final command of a multi-plane read
operation. It is preceded by one or more READ PAGE MULTI-PLANE (00h-32h)
commands. Data is transferred from the NAND Flash array for all of the addressed
planes to their respective cache registers. When the LUN is ready (RDY = 1, ARDY = 1),
data output is enabled for the cache register linked to the plane addressed in the READ
PAGE (00h-30h) command. When the host requests data output, output begins at the
column address last specified in the READ PAGE (00h-30h) command. The SELECT
CACHE REGISTER (06h-E0h) command is used to enable data output in the other cache
registers. See “Multi-Plane Addressing” on page 86 for additional multi-plane addressing
requirements.
Address
C1
Address
C2
Micron Confidential and Proprietary
Address
8Gb Asychronous/Synchronous NAND Flash Memory
R1
Address
R2
64
Address
R3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Command
30h
t WB
t
R as data is transferred.
t R
Command Definitions
t RR
©2008 Micron Technology, Inc. All rights reserved.
D
D n
OUT
D
D n+1
OUT
D
D n+2
OUT
Advance