S25FL016A0LMFI011

Manufacturer Part NumberS25FL016A0LMFI011
ManufacturerSpansion Inc.
S25FL016A0LMFI011 datasheet
 


Specifications of S25FL016A0LMFI011

Cell TypeNORDensity16Mb
Access Time (max)10nsInterface TypeSerial (SPI)
Boot TypeNot RequiredAddress Bus1b
Operating Supply Voltage (typ)3/3.3VOperating Temp Range-40C to 85C
Package TypeSOIC WProgram/erase Volt (typ)2.7 to 3.6V
Sync/asyncSynchronousOperating Temperature ClassificationIndustrial
Operating Supply Voltage (min)2.7VOperating Supply Voltage (max)3.6V
Word Size8bNumber Of Words2M
Supply Current19mAMountingSurface Mount
Pin Count8Lead Free Status / RoHS StatusCompliant
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CS#
Mode 3
SCK
Mode 0
SI
CS#
40
41
SCK
7
6
SI
MSB
9.9
Sector Erase (SE)
The Sector Erase (SE) command sets all bits at all addresses within a specified sector to a logic 1. A WREN
command is required prior to writing the PP command.
The host system must drive CS# low, and then write the SE command plus three address bytes on SI. Any
address within the sector (see
driven low for the entire duration of the SE sequence. The command sequence is shown in
Table 9.4 on page
25.
The host system must drive CS# high after the device has latched the 8th bit of the SE command, otherwise
the device does not execute the command. The SE operation begins as soon as CS# is driven high. The
device internally controls the timing of the operation, which requires a period of t
be read to check the value of the Write In Progress (WIP) bit while the SE operation is in progress. The WIP
bit is 1 during the SE operation, and is 0 when the operation is completed. The device internally resets the
Write Enable Latch to 0 before the operation completes (the exact timing is not specified).
The device does not execute an SE command that specifies a sector that is protected by the Block Protect
bits (BP2:BP0) (see
CS#
Mode 3
SCK
Mode 0
SI
Hi-Z
SO
22
D a t a
S h e e t
Figure 9.8 Page Program (PP) Command Sequence
5
8
0
2
4
6
7
1
3
9
10
24-Bit Address
Command
23 22 21
MSB
47 48 49 50 51 52 53 54 55
44
45
46
42
43
Data Byte 2
Data Byte 3
5
4
3
2
1
0
7
6
5
4
3
2
1
MSB
Table 7.1 on page
13) is a valid address for the SE command. CS# must be
Table 7.1 on page
13).
Figure 9.9 Sector Erase (SE) Command Sequence
0
1
2
3
4
5
6
7
Command
23 22
MSB
S25FL016A
28
32
33
34
35 36 37 38 39
29
30
31
Data Byte 1
4
3
2
3
2
1
0
7
6
5
1
0
MSB
Data Byte 256
0
7
6
5
4
3
2
1
0
MSB
Figure 9.9
. The Status Register may
SE
8
9
10
28
29
30
31
24-bit Address
1
21
3
2
0
S25FL016A_00_C4 February 27, 2009
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