MT45W1MW16BDGB-708 AT Micron Technology Inc, MT45W1MW16BDGB-708 AT Datasheet - Page 51

• Manufacturer Part Number: MT45W1MW16BDGB-708 AT
• Manufacturer: Micron Technology Inc

Specifications of MT45W1MW16BDGB-708 AT

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Figure 41:
PDF: 09005aef81cb58ed/Source: 09005aef81c7a667
16mb_burst_cr1_0_p23z_2.fm - Rev. H 4/08 EN
DQ[15:0]
LB#/UB#
A[19:0]
IN/OUT
ADV#
WAIT
WE#
OE#
CLK
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IL
OH
OL
IH
IL
IH
IL
IH
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
Asynchronous WRITE Followed by Burst READ
t VPH
High-Z
t WHZ
VALID ADDRESS
t AS
t AVS
Notes:
t CVS
t VP
t CW
t WC
t WP
DATA
t AVH
t DH
t WPH
t WC
1. Non-default BCR settings for asynchronous WRITE followed by burst READ: Latency code
2. When configured for synchronous mode (BCR[15] = 0), a refresh opportunity must be pro-
3. Clock rates below 50 MHz (
VALID ADDRESS
t AW
two (three clocks); WAIT active LOW; WAIT asserted during delay.
vided every
tions: a) clocked CE# HIGH, or b) CE# HIGH for greater than 15ns. Note that the CellularRAM
Workgroup 1.0 specification requires CE# to be clocked HIGH to terminate the burst.
t BW
t VS
t AS
t DW
DATA
t WC
16Mb: 1 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
t WR
t CKA
t
CEM. A refresh opportunity is satisfied by either of the following two condi-
t CBPH
2
t CSP
V
V
t SP
t CEW
t SP
ADDRESS
OH
OL
t SP
t SP t HD
VALID
t HD
t HD
t HD
t CLK
High-Z
t
CLK > 20ns) are allowed as long as
51
t ABA
t ACLK
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t BOE
OUTPUT
VALID
t KOH
OUTPUT
VALID
DON’T CARE
t
OUTPUT
CSP specifications are met.
©2005 Micron Technology, Inc. All rights reserved.
VALID
Timing Diagrams
OUTPUT
VALID
t OHZ
UNDEFINED
High-Z