MT45W1MW16BDGB-708 IT TR Micron Technology Inc, MT45W1MW16BDGB-708 IT TR Datasheet - Page 50

MT45W1MW16BDGB-708 IT TR

Manufacturer Part Number
MT45W1MW16BDGB-708 IT TR
Description
Manufacturer
Micron Technology Inc

Specifications of MT45W1MW16BDGB-708 IT TR

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
Figure 40:
PDF: 09005aef81cb58ed/Source: 09005aef81c7a667
16mb_burst_cr1_0_p23z_2.fm - Rev. H 4/08 EN
DQ[15:0]
LB#/UB#
A[19:0]
IN/OUT
ADV#
WAIT
WE#
OE#
CLK
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
IH
IL
High-Z
Burst WRITE Followed by Burst READ
t CSP
t SP
t SP t HD
t SP
ADDRESS
VALID
Notes:
t HD
t HD
High-Z
1. Non-default BCR settings for burst WRITE followed by burst READ: Latency code two (three
2. When configured for synchronous mode (BCR[15] = 0), a refresh opportunity must be pro-
3. Clock rates below 50 MHz (
t CLK
clocks); WAIT active LOW; WAIT asserted during delay.
vided every
tions: a) clocked CE# HIGH, or b) CE# HIGH for greater than 15ns. Note that the CellularRAM
Workgroup 1.0 specification requires CE# to be clocked HIGH to terminate the burst.
t SP
t SP t HD
16Mb: 1 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
D[0]
t HD
t
D[1]
CEM. A refresh opportunity is satisfied by either of the following two condi-
D[2]
D[3]
t
t HD
CLK > 20ns) are allowed as long as
50
t CBPH
2
t CSP
t SP
t SP t HD
t SP t HD
V
V
ADDRESS
OH
OL
VALID
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t HD
High-Z
t ABA
t ACLK
t BOE
OUTPUT
VALID
t KOH
t
OUTPUT
CSP specifications are met.
©2005 Micron Technology, Inc. All rights reserved.
VALID
Timing Diagrams
DON’T CARE
OUTPUT
VALID
OUTPUT
VALID
t OHZ
UNDEFINED
High-Z

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