GS8320Z36GT-250 GSI TECHNOLOGY, GS8320Z36GT-250 Datasheet

GS8320Z36GT-250

Manufacturer Part Number

GS8320Z36GT-250

Description

Manufacturer

GSI TECHNOLOGY

Datasheet

1.GS8320Z36GT-250.pdf (25 pages)

Specifications of GS8320Z36GT-250

Density

36Mb

Access Time (max)

6.5ns

Sync/async

Synchronous

Architecture

SDR

Clock Freq (max)

153.8MHz

Operating Supply Voltage (typ)

2.5/3.3V

Address Bus

20b

Package Type

TQFP

Operating Temp Range

0C to 70C

Number Of Ports

Supply Current

210mA

Operating Supply Voltage (min)

2.3/3V

Operating Supply Voltage (max)

2.7/3.6V

Operating Temperature Classification

Commercial

Mounting

Surface Mount

Pin Count

100

Word Size

36b

Number Of Words

Lead Free Status / RoHS Status

Compliant

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100-Pin TQFP

Commercial Temp

Industrial Temp

Features

• NBT (No Bus Turn Around) functionality allows zero wait

• 2.5 V or 3.3 V +10%/–10% core power supply

• 2.5 V or 3.3 V I/O supply

• User-configurable Pipeline and Flow Through mode

• LBO pin for Linear or Interleave Burst mode

• Pin compatible with 2Mb, 4Mb, 8Mb, and 16Mb devices

• Byte write operation (9-bit Bytes)

• 3 chip enable signals for easy depth expansion

• ZZ Pin for automatic power-down

• JEDEC-standard 100-lead TQFP package

• RoHS-compliant 100-lead TQFP package available

Functional Description

The GS8320Z18/36T is a 36Mbit Synchronous Static SRAM.

GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other

pipelined read/double late write or flow through read/single

late write SRAMs, allow utilization of all available bus

bandwidth by eliminating the need to insert deselect cycles

when the device is switched from read to write cycles.

Rev: 1.03c 12/2007

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

read-write-read bus utilization; Fully pin-compatible with

both pipelined and flow through NtRAM™, NoBL™ and

ZBT™ SRAMs

Through

Pipeline

3-1-1-1

2-1-1-1

36Mb Pipelined and Flow Through

Flow

Synchronous NBT SRAMs

Curr

tCycle

(x32/x36)

(x18)

Parameter Synopsis

1/25

-250 -225 -200 -166 -150 -133 Unit

285

350

205

235

2.5

4.0

6.5

265

320

195

225

2.7

4.4

7.0

Because it is a synchronous device, address, data inputs, and

read/ write control inputs are captured on the rising edge of the

input clock. Burst order control (LBO) must be tied to a power

rail for proper operation. Asynchronous inputs include the

Sleep mode enable (ZZ) and Output Enable. Output Enable can

be used to override the synchronous control of the output

drivers and turn the RAM's output drivers off at any time.

Write cycles are internally self-timed and initiated by the rising

edge of the clock input. This feature eliminates complex off-

chip write pulse generation required by asynchronous SRAMs

and simplifies input signal timing.

The GS8320Z18/36T may be configured by the user to operate

in Pipeline or Flow Through mode. Operating as a pipelined

synchronous device, meaning that in addition to the rising edge

triggered registers that capture input signals, the device

incorporates a rising-edge-triggered output register. For read

cycles, pipelined SRAM output data is temporarily stored by

the edge triggered output register during the access cycle and

then released to the output drivers at the next rising edge of

clock.

The GS8320Z18/36T is implemented with GSI's high

performance CMOS technology and is available in a JEDEC-

standard 100-pin TQFP package.

245

295

185

210

3.0

5.0

7.5

220

260

175

200

3.5

6.0

8.0

GS8320Z18/36T-250/225/200/166/150/133

210

240

165

190

3.8

6.6

8.5

185

215

155

175

4.0

7.5

8.5

250 MHz–133 MHz

2.5 V or 3.3 V V

2.5 V or 3.3 V I/O

Related parts for GS8320Z36GT-250

GS8320Z36GT-250 Summary of contents

Page 1

... Curr 205 195 185 175 (x18) Curr 235 225 210 200 (x32/x36) 1/25 250 MHz–133 MHz 3.3 V I/O 3.8 4.0 ns 6.6 7.5 ns 210 185 mA 240 215 mA 8.5 8.5 ns 8.5 8.5 ns 165 155 mA 190 175 mA © 2001, GSI Technology DD ...

Page 2

... DDQ DDQ DDQ DQP DDQ Rev: 1.03c 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8320Z18/36T-250/225/200/166/150/133 GS8320Z18T Pinout Top View 2/ DDQ DQP DDQ DDQ DDQ © 2001, GSI Technology ...

Page 3

... DQP DDQ DDQ DDQ DDQ DQP Rev: 1.03c 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8320Z18/36T-250/225/200/166/150/133 GS8320Z36T Pinout Top View 3/25 DQP DDQ DDQ DDQ DDQ DQP 51 A © 2001, GSI Technology ...

Page 4

... Byte D Data Input and Output pins Power down control; active high Pipeline/Flow Through Mode Control; active low Linear Burst Order; active low Core power supply Ground Output driver power supply No Connect 4/25 ; active low A9 ; active low B9 ; active low C9 ; active low D9 © 2001, GSI Technology ...

Page 5

... GS8320Z18/36 NBT SRAM Functional Block Diagram Rev: 1.03c 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8320Z18/36T-250/225/200/166/150/133 Amps Sense Drivers Write 5/25 © 2001, GSI Technology ...

Page 6

... Rev: 1.03c 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8320Z18/36T-250/225/200/166/150/133 & determine which bytes will be written. All or none may be activated. A write and E ). Deassertion of any one of the Enable © 2001, GSI Technology ...

Page 7

... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8320Z18/36T-250/225/200/166/150/133 External L Next L External L Next L External L Next L Next L None L None L None L None L None L None Current L 7/ High High High-Z 1,2,3, High High High High High High © 2001, GSI Technology Notes 1,10 2 1,2,10 3 1,3, ...

Page 8

... and D represent input command codes ,as indicated in the Synchronous Truth Table. n+1 n+2 ƒ ƒ Next State Pipeline and Flow Through Read/Write Control State Diagram 8/25 New Write Burst Write B D n+3 ƒ ƒ © 2001, GSI Technology ...

Page 9

... and D represent input command codes as indicated in the Truth Tables. Next State (n+2) n n+1 n+2 ƒ ƒ Intermediate Current State State Pipeline Mode Data I/O State Diagram 9/25 Intermediate R B Data Out W (Q Valid) D n+3 ƒ ƒ Next State © 2001, GSI Technology ...

Page 10

... Pipeline and Flow Through Read Write Control State Diagram 10/ Data Out W (Q Valid) D Notes 1. The Hold command (CKE Low) is not shown because it prevents any state change and D represent input command codes as indicated in the Truth Tables. n+2 n+3 ƒ ƒ © 2001, GSI Technology ...

Page 11

... H L SCD Activate DQPx I/Os (x18/x3672 mode Deactivate DQPx I/Os (x16/x3272 mode) 11/25 Function Linear Burst Interleaved Burst Flow Through Pipeline Active Standby Dual Cycle Deselect Single Cycle Deselect High Drive (Low Impedance) Low Drive (High Impedance) © 2001, GSI Technology ...

Page 12

... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8320Z18/36T-250/225/200/166/150/133 Interleaved Burst Sequence 10 11 1st address 11 00 2nd address 00 01 3rd address 01 10 4th address Note: The burst counter wraps to initial state on the 5th clock. 12/25 A[1:0] A[1:0] A[1:0] A[1: BPR 1999.05.18 © 2001, GSI Technology ...

Page 13

... Rev: 1.03c 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8320Z18/36T-250/225/200/166/150/133 Sleep Mode Timing Diagram tKH tKH tKL tKL tZZS tZZH DD 13/25 2. The duration of SB tZZR pipelined parts and V on flow DDQ SS © 2001, GSI Technology ...

Page 14

... Value –0.5 to 4.6 –0.5 to 4.6 –0 +0.5 (≤ 4.6 V max.) DDQ –0 +0.5 (≤ 4.6 V max.) DD +/–20 +/–20 1.5 –55 to 125 –55 to 125 Typ. Max. Unit 3.3 3.6 V 2.5 2.7 V 3.3 3.6 V 2.5 2.7 V © 2001, GSI Technology Unit Notes ...

Page 15

... V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC. DDn 15/25 Max. Unit Notes 0.3 V 1,3 DDQ 0.8 V 1,3 Max. Unit Notes 0.3 0.3 V 1,3 DDQ 0.3*V V 1,3 DD Max. Unit Notes ° ° © 2001, GSI Technology ...

Page 16

... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8320Z18/36T-250/225/200/166/150/133 Overshoot Measurement and Timing Symbol Test conditions I/O OUT Conditions V – DDQ V /2 DDQ Fig. 1 Output Load 1 50Ω 30pF V DDQ/2 * Distributed Test Jig Capacitance 16/25 20% tKC DD IL Typ. Max. Unit © 2001, GSI Technology ...

Page 17

... IN I IN1 0 V ≤ Output Disable OUT I Output Disable OUT –8 mA, V OH2 OH DDQ –8 mA, V OH3 OH DDQ 17/25 Min – ≥ V – ≤ V –1 uA 100 – – 2.375 V 1 3.135 V 2.4 V — © 2001, GSI Technology Max — — 0.4 V ...

Page 18

... Rev: 1.03c 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8320Z18//36T-250/225/200/166/150/133 18/25 © 2001, GSI Technology ...

Page 19

... GSI Technology -133 Unit Min Max 7.5 ns — — 4.0 ns 1.5 ns — 1.5 — ns 1.5 ns — 0.5 — ns 8.5 ns — — 8 ...

Page 20

... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8320Z18/36T-250/225/200/166/150/133 Pipeline Mode Timing (NBT) Suspend Read C Write D writeno-op tKH tKH tKC tKC tKL tKL D(A) Q(B) Q(C) 20/25 Read E Deselect E tLZ tHZ tKQ tKQX D(D) Q(E) © 2001, GSI Technology ...

Page 21

... Flow Through Mode Timing (NBT) Write B+1 Read C Cont tKL tKL tKH tKH tKC tKC C D tKQ tLZ D(B) D(B+1) Q(C) tOHZ 21/25 Read D Write E Read F Write tKQ tKQX tHZ tLZ Q(D) D(E) Q(F) tOLZ tOE © 2001, GSI Technology tKQX D(G) ...

Page 22

... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8320Z18/36T-250/225/200/166/150/133 θ 0.10 0.15 1.40 1.45 0.30 0.40 — 0.20 e 22.0 22.1 20.0 20.1 16.0 16.1 b 14.0 14.1 0.65 — 0.60 0.75 1.00 — 0.10 — 7° 22/ © 2001, GSI Technology ...

Page 23

... GSI offers other versions this type of device in many different configurations and with a variety of different features, only some of which are covered in this data sheet. See the GSI Technology web site (www.gsitechnology.com) for a complete listing of current offerings Rev: 1.03c 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. ...

Page 24

... GS8320Z36GT-133 GS8320Z18GT-250I GS8320Z18GT-225I GS8320Z18GT-200I GS8320Z18GT-166I GS8320Z18GT-150I GS8320Z18GT-133I GS8320Z36GT-250I GS8320Z36GT-225I GS8320Z36GT-200I GS8320Z36GT-166I GS8320Z36GT-150I GS8320Z36GT-133I Notes: 1. Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. Example: GS8320Z36T-166IT. 2. The speed column indicates the cycle frequency (MHz) of the device in Pipeline mode and the latency (ns) in Flow Through mode. Each device is Pipeline/Flow Through mode-selectable by the user ...

Page 25

... Corrected Absolute Maximum Ratings table • Corrected Capacitance table • Updated DC Electrical Characteristics table • Removed Output Load 2 diagram on page 15 • Updated format • Added RoHS-compliant information for TQFP package Content/Format • (Rev 1.03c: Removed Preliminary banner due to production status) 25/25 © 2001, GSI Technology ...

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