ISP1760ET,557 NXP Semiconductors, ISP1760ET,557 Datasheet - Page 31

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ISP1760ET,557

Manufacturer Part Number
ISP1760ET,557
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1760ET,557

Package Type
TFBGA
Pin Count
128
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
Table 9.
Table 10.
Table 11.
ISP1760_4
Product data sheet
Bit
7 to 0
Bit
15 to 0
Bit
Symbol
Reset
Access
Symbol
CAPLENGTH[7:0] R
Symbol
HCIVERSION[15:0] R
CAPLENGTH - Capability Length register (address 0000h) bit description
HCIVERSION - Host Controller Interface Version Number register (address 0002h) bit description
HCSPARAMS - Host Controller Structural Parameters register (address 0004h) bit allocation
8.1.1 CAPLENGTH register
8.1.2 HCIVERSION register
8.1.3 HCSPARAMS register
8.1 EHCI capability registers
31
R
0
Table 8.
The bit description of the Capability Length (CAPLENGTH) register is given in
Table 10
(HCIVERSION) register.
The Host Controller Structural Parameters (HCSPARAMS) register is a set of fields that
are structural parameters. The bit allocation is given in
Address
0344h
0354h
0374h
Interrupt registers
0310h
0314h
0318h
031Ch
0320h
0324h
0328h
032Ch
Access Value
30
Access Value
R
0
shows the bit description of the Host Controller Interface Version Number
Register overview
20h
0100h
Register
DMA Start Address
Power Down Control
Port 1 Control
Interrupt
Interrupt Enable
ISO IRQ Mask OR
INT IRQ Mask OR
ATL IRQ Mask OR
ISO IRQ Mask AND
INT IRQ Mask AND
ATL IRQ Mask AND
29
R
0
Rev. 04 — 4 February 2008
Description
Capability Length: This is used as an offset. It is added to the register
base to find the beginning of the operational register space.
Description
Host Controller Interface Version Number: It contains a BCD
encoding of the version number of the interface to which the host
controller interface conforms.
…continued
28
R
0
reserved
Reset value
0000 0000h
03E8 1BA0h
0086 0086h
0000 0000h
0000 0000h
0000 0000h
0000 0000h
0000 0000h
0000 0000h
0000 0000h
0000 0000h
27
R
0
Embedded Hi-Speed USB host controller
Table
26
R
0
References
Section 8.3.10 on page 47
Section 8.3.11 on page 48
Section 8.3.12 on page 50
Section 8.4.1 on page 51
Section 8.4.2 on page 53
Section 8.4.3 on page 54
Section 8.4.4 on page 55
Section 8.4.5 on page 55
Section 8.4.6 on page 55
Section 8.4.7 on page 55
Section 8.4.8 on page 56
11.
25
R
0
© NXP B.V. 2008. All rights reserved.
ISP1760
Table
30 of 110
24
R
0
9.

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