ISP1760ET,557 NXP Semiconductors, ISP1760ET,557 Datasheet - Page 58

• Manufacturer Part Number: ISP1760ET,557
• Manufacturer: NXP Semiconductors

Specifications of ISP1760ET,557

• Package Type: TFBGA
• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
ISP1760_4
Product data sheet
Multiple transfers are scheduled to the shared memory for various endpoints by traversing
the next link pointer provided by endpoint data structures, until it reaches the end of the
endpoint list. There are three endpoint lists: one for ISO endpoints, and the other for INTL
and ATL endpoints. If the schedule is enabled, the host controller executes the ISO
schedule, followed by the INTL schedule, and then the ATL schedule.
These lists are traversed and scheduled by the software according to the EHCI traversal
rule. The host controller executes the scheduled ISO, INTL and ATL PTDs. The
completion of a transfer is indicated to the software by the interrupt that can be grouped
under various PTDs by using the AND or OR registers that are available for each schedule
type: ISO, INTL and ATL. These registers are simple logic registers to decide the
completion status of group and individual PTDs. When the logical conditions of the Done
bit is true in the shared memory, it means that PTD has completed.
There are four types of interrupts in the ISP1760: ISO, INTL, ATL and SOF. The latency
can be programmed in multiples of SOF (125 s).
The NextPTD pointer is a feature that allows the ISP1760 to jump unused and skip PTDs.
This will improve the PTD transversal latency time. The NextPTD pointer is not meant for
same or single endpoint. The NextPTD works only in forward direction.
The NextPTD traversal rules defined by the ISP1760 hardware are:
1. Start the PTD memory vertical traversal, considering the skip and LastPTD
2. If the current PTD is active and not done, perform the transaction.
3. Follow the NextPTD pointer as specified in bits 4 to 0 of DW4.
4. If combined with LastPTD, the LastPTD setting must be at a higher address than the
5. If combined with skip, the skip must not be set (logically) on the same position
6. If PTD is set for skip, it will be neglected and the next vertical PTD will be considered.
7. If the skipped PTD already has a setting including a NextPTD pointer that will not be
information, as follows.
NextPTD specified. So both are set in a logical manner.
corresponding to NextPTD, pointed by the NextPTD pointer.
taken into consideration, the behavior will be just as described in the preceding step.
Rev. 04 — 4 February 2008
Embedded Hi-Speed USB host controller
© NXP B.V. 2008. All rights reserved.
ISP1760
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