ISP1760ET,557

Manufacturer Part NumberISP1760ET,557
ManufacturerNXP Semiconductors
ISP1760ET,557 datasheet
 


Specifications of ISP1760ET,557

Package TypeTFBGAPin Count128
Lead Free Status / RoHS StatusCompliant  
1
2
3
4
5
6
7
8
9
10
11
Page 11
12
Page 12
13
Page 13
14
Page 14
15
Page 15
16
Page 16
17
Page 17
18
Page 18
19
Page 19
20
Page 20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
Page 12/111

Download datasheet (570Kb)Embed
PrevNext
NXP Semiconductors
Table 2.
Pin description
…continued
[1][2]
Symbol
Pin
LQFP128
TFBGA128
CS_N
106
A12
RD_N
107
B12
WR_N
108
B11
GNDD
109
A11
BAT_ON_N
110
C10
n.c.
111
A10
IRQ
112
B10
n.c.
113
A9
DREQ
114
B9
V
115
C8
CC(I/O)
DACK
116
A8
TEST3
117
B8
REG1V8
118
B7
SUSPEND/
119
A7
WAKEUP_N
TEST4
120
C6
GNDC
121
A6
RESET_N
122
B6
GNDA
123
B5
TEST5
124
A5
TEST6
125
B4
ISP1760_4
Product data sheet
Embedded Hi-Speed USB host controller
[3]
Type
Description
I
chip select signal assertion indicates the ISP1760 being accessed;
active LOW
input, 3.3 V tolerant
I
read enable; active LOW
input, 3.3 V tolerant
I
write enable; active LOW
input, 3.3 V tolerant
-
digital ground
OD
to indicate the presence of a minimum 3.3 V on pins 6 and 7
(open-drain); connect to V
output pad, push-pull open-drain, 8 mA output drive, 5 V tolerant
-
not connected
O
host controller interrupt signal
output pad, 4 mA drive, 3.3 V tolerant
-
not connected
O
DMA controller request for the host controller
output pad, 4 mA drive, 3.3 V tolerant
P
digital supply voltage; 1.65 V to 3.6 V; connect a 100 nF decoupling
capacitor; see
Section 7.8
I
host controller DMA request acknowledgment; when not in use,
connect to V
through a 10 k pull-up resistor
CC(I/O)
input, 3.3 V tolerant
-
connect to V
through a 10 k pull-up resistor
CC(I/O)
P
core power output (1.8 V); internal 1.8 V for the digital core; used for
decoupling; connect a 100 nF capacitor; for details on additional
capacitor placement, see
I/OD
host controller suspend and wake-up; 3-state suspend output (active
LOW) and wake-up input circuits are connected together
HIGH = output is 3-state; ISP1760 is in suspend mode
LOW = output is LOW; ISP1760 is not in suspend mode
connect to V
through an external 10 k pull-up resistor
CC(I/O)
output pad, open-drain, 4 mA output drive, 3.3 V tolerant
-
pull up to V
CC(I/O)
-
core ground
I
external power-up reset; active LOW; when reset is asserted, it is
expected that bus signals are idle, that is, not toggling
input, 3.3 V tolerant
Remark: During reset, ensure that all the input pins to the ISP1760
are not toggling and are in their inactive states.
-
analog ground
-
connect a 220 nF capacitor between this pin and pin 125
-
connect a 220 nF capacitor between this pin and pin 124
Rev. 04 — 4 February 2008
ISP1760
through a 10 k pull-up resistor
CC(I/O)
Section 7.8
© NXP B.V. 2008. All rights reserved.
11 of 110