ISP1760ET,557

Manufacturer Part NumberISP1760ET,557
ManufacturerNXP Semiconductors
ISP1760ET,557 datasheet
 


Specifications of ISP1760ET,557

Package TypeTFBGAPin Count128
Lead Free Status / RoHS StatusCompliant  
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NXP Semiconductors
Table 36.
Chip ID - Chip Identifier register (address 0304h) bit description
Bit
Symbol
Access Value
31 to 0 CHIPID[31:0] R
8.3.3 Scratch register
This register is for testing and debugging purposes only. The value read back must be the
same as the value that was written. The bit description of this register is given in
Table 37.
Scratch register (address 0308h) bit description
Bit
Symbol
Access
31 to 0
SCRATCH[31:0]
R/W
8.3.4 SW Reset register
Table 38
Table 38.
SW Reset - Software Reset register (address 030Ch) bit allocation
Bit
31
Symbol
Reset
0
Access
R/W
R/W
Bit
23
Symbol
Reset
0
Access
R/W
R/W
Bit
15
Symbol
Reset
0
Access
R/W
R/W
Bit
7
Symbol
Reset
0
Access
R/W
R/W
[1]
The reserved bits should always be written with the reset value.
ISP1760_4
Product data sheet
Description
0001 1761h Chip ID: This register represents the hardware version number (0001h) and
the chip ID (1761h).
Remark: The chip ID is for internal use to identify the ISP176x product
family.
Value
Description
0000 0000h
Scratch: For testing and debugging purposes
shows the bit allocation of the register.
30
29
28
reserved
0
0
0
R/W
R/W
22
21
20
reserved
0
0
0
R/W
R/W
14
13
12
reserved
0
0
0
R/W
R/W
6
5
4
[1]
reserved
0
0
0
R/W
R/W
Rev. 04 — 4 February 2008
ISP1760
Embedded Hi-Speed USB host controller
27
26
25
[1]
0
0
0
R/W
R/W
R/W
19
18
17
[1]
0
0
0
R/W
R/W
R/W
11
10
9
[1]
0
0
0
R/W
R/W
R/W
3
2
1
RESET_
HC
0
0
0
R/W
R/W
R/W
© NXP B.V. 2008. All rights reserved.
Table
37.
24
0
R/W
16
0
R/W
8
0
R/W
0
RESET_
ALL
0
R/W
42 of 110