ISP1760ET,557

Manufacturer Part NumberISP1760ET,557
ManufacturerNXP Semiconductors
ISP1760ET,557 datasheet
 


Specifications of ISP1760ET,557

Package TypeTFBGAPin Count128
Lead Free Status / RoHS StatusCompliant  
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NXP Semiconductors
6.2 Pin description
Table 2.
Pin description
[1][2]
Symbol
Pin
LQFP128
TFBGA128
OC3_N
1
C2
REF5V
2
A2
TEST1
3
B2
GNDA
4
A1
REG1V8
5
B1
V
6
C1
CC(5V0)
V
7
D2
CC(5V0)
GND(OSC)
8
E3
REG3V3
9
D1
V
10
E2
CC(I/O)
XTAL1
11
E1
XTAL2
12
F2
CLKIN
13
F1
GNDD
14
G3
GND(RREF1)
15
G2
RREF1
16
G1
[4]
GNDA
17
H2
DM1
18
H1
GNDA
19
J3
DP1
20
J2
PSW1_N
21
J1
GND(RREF2)
22
K2
RREF2
23
K1
[5]
GNDA
24
L3
DM2
25
L1
GNDA
26
L2
DP2
27
M2
ISP1760_4
Product data sheet
Embedded Hi-Speed USB host controller
[3]
Type
Description
AI
port 3 analog (5 V input) and digital overcurrent input; if not used,
connect to V
through a 10 k resistor
CC(I/O)
input, 5 V tolerant
AI
5 V reference input for analog OC detector; connect a 100 nF
decoupling capacitor
-
connect to ground
-
analog ground
P
core power output (1.8 V); internal 1.8 V for the digital core; used for
decoupling; connect a 100 nF capacitor; for details on additional
capacitor placement, see
P
input to internal regulators (3.0 V to 5.5 V); connect a 100 nF
decoupling capacitor; see
P
input to internal regulators (3.0 V to 5.5 V); connect a 100 nF
decoupling capacitor; see
-
oscillator ground
P
regulator output (3.3 V); for decoupling only; connect a 100 nF
capacitor and a 4.7 F-to-10 F capacitor; see
P
digital supply voltage; 1.65 V to 3.6 V; connect a 100 nF decoupling
capacitor; see
Section 7.8
AI
12 MHz crystal connection input; connect to ground if an external
clock is used; see
Table 88
AO
12 MHz crystal connection output
I
12 MHz oscillator or clock input; when not in use, connect to V
-
digital ground
-
RREF1 ground
AI
reference resistor connection; connect a 12 k
between this pin and the RREF1 ground
-
analog ground
AI/O
downstream data minus port 1
-
analog ground
AI/O
downstream data plus port 1
OD
power switch port 1, active LOW
output pad, push-pull open-drain, 8 mA output drive, 5 V tolerant
-
RREF2 ground
AI
reference resistor connection; connect a 12 k
between this pin and the RREF2 ground
-
analog ground
AI/O
downstream data minus port 2
-
analog ground
AI/O
downstream data plus port 2
Rev. 04 — 4 February 2008
ISP1760
Section 7.8
Section 7.8
Section 7.8
Section 7.8
1 % resistor
1 % resistor
© NXP B.V. 2008. All rights reserved.
CC(I/O)
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