ISP1760ET,557

Manufacturer Part NumberISP1760ET,557
ManufacturerNXP Semiconductors
ISP1760ET,557 datasheet
 


Specifications of ISP1760ET,557

Package TypeTFBGAPin Count128
Lead Free Status / RoHS StatusCompliant  
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Page 76/111

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9.5 Start and complete split for isochronous
Table 75
shows the bit allocation for start and complete split for isochronous, split isochronous Transfer Descriptor (siTD).
Table 75.
Start and complete split for isochronous: bit allocation
Bit
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
DW7
DW5
ISO_IN_2[7:0]
[1]
DW3
A
H
B
X
SC
DT
DW1
HubAddress[6:0]
PortNumber[6:0]
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
DW6
ISO_IN_6[7:0]
DW4
Status7[2:0]
Status6[2:0]
Status5[2:0]
DW2
reserved
[2]
[1]
DW0
TT_MPS_Len[10:0]
[1]
Reserved.
[2]
EndPt[0].
reserved
ISO_IN_1[7:0]
ISO_IN_0[7:0]
reserved
reserved
S
EP
Type
[1:0]
ISO_IN_5[7:0]
ISO_IN_4[7:0]
Status4[2:0]
Status3[2:0]
Status2[2:0]
Status1[2:0]
DataStartAddress[15:0]
NrBytesToTransfer[14:0] (1 kB for full-speed)
ISO_IN_7[7:0]
[2]
SCS[7:0]
NrBytesTransferred[11:0]
Token
DeviceAddress[6:0]
EndPt[3:1]
[1:0]
9
8
7
6
5
4
3
2
1
ISO_IN_3[7:0]
Status0[2:0]
SA[7:0]
Frame[7:0] (full-speed)
[1]
0
V