ISP1760BE,557 NXP Semiconductors, ISP1760BE,557 Datasheet - Page 82

• Manufacturer Part Number: ISP1760BE,557
• Manufacturer: NXP Semiconductors

Specifications of ISP1760BE,557

• Package Type: LQFP
• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
Table 78.
ISP1760_4
Product data sheet
Bit
10 to 8
7 to 0
DW3
63
62
61
60
59
58
57
56 to 55
54 to 44
43 to 32
DW2
31 to 24
23 to 8
7 to 0
DW1
63 to 57
Symbol
Status0[2:0]
A
H
B
X
SC
reserved
DT
Cerr[1:0]
reserved
NrBytes
Transferred[11:0]
reserved
DataStart
Address[15:0]
HubAddress
[6:0]
Start and complete split for interrupt: bit description
SA[7:0]
Frame[7:0]
Access
HW — writes
SW — writes
(0
HW — writes
(1
After
processing
SW — sets
HW — resets
HW — writes
HW — writes
HW — writes
SW — writes 0
HW — updates
-
HW — writes
SW — writes
HW — writes
SW — writes
-
HW — writes
-
SW — writes
SW — writes
SW — writes
1)
0)
Value
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Rev. 04 — 4 February 2008
Description
Interrupt IN or OUT status of SOF0
Bit 0 — Transaction error (IN and OUT)
Bit 1 — Babble (IN token only)
Bit 2 — Underrun (OUT token only)
Specifies which SOF the start split needs to be placed.
For OUT token: When the frame number of bits DW1[7:3]
matches the frame number of the USB bus, these bits are checked
for one before they are sent for the SOF.
For IN token: Only SOF0, SOF1, SOF2 or SOF3 can be set
to 1. Nothing can be set for SOF4 and above.
Active: Write the same value as that in V.
Halt: The Halt bit is set when any microframe transfer status has a
stalled or halted condition.
Babble: This bit corresponds to bit 1 of Status0 to Status7 for
every microframe transfer status.
Transaction Error: This bit corresponds to bit 0 of Status0 to
Status7 for every microframe transfer status.
Start/Complete:
0 — Start split
1 — Complete split
-
Data Toggle: For an interrupt transfer, set correct bit to start the
PTD.
Error Counter: This field corresponds to the Cerr[1:0] field in TD.
00 — The transaction will not retry.
11 — The transaction will retry three times. Hardware will
decrement these values.
-
Number of Bytes Transferred: This field indicates the number of
bytes sent or received for this transaction.
-
Data Start Address: This is the start address for data that will be
sent or received on or from the USB bus. This is the internal
memory address and not the CPU address.
Bits 7 to 3 is the polling rate in milliseconds. Polling rate is defined
as 2
millisecond. See
Hub Address: This indicates the hub address.
(b
1)
SOF; where b = 4 to 16. When b is 4, executed every
…continued
Table
Embedded Hi-Speed USB host controller
79.
© NXP B.V. 2008. All rights reserved.
ISP1760
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