NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 185

• Manufacturer Part Number: NQ5000P S L9TN
• Manufacturer: Intel

Specifications of NQ5000P S L9TN

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Register Description
3.8.13.9
.
3.8.13.10
.
3.8.13.11
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
NRECADDRL[1:0]: Non Recoverable FSB Address Low Error Log
Register
This register captures the lower 32 bits of the FSB address for non recoverable errors
when a fatal error is logged in its corresponding FERR_FAT_FSB Register. This register
is only valid for Request FSB Errors.
NRECADDRH[1:0]: Non Recoverable FSB Address High Error Log
Register
This register captures the upper 8 bits of the FSB address for non recoverable errors
when a fatal error is logged in its corresponding FERR_FAT_FSB Register. This register
is only valid for Request FSB Errors.
EMASK_FSB[1:0]: FSB Error Mask Register
A ‘0’ in any field enables that error.
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
31:4
15:9
2:0
7:0
Bit
Bit
Bit
3
8
7
6
5
4
3
2
1
0
ROST
ROST
ROST
Attr
Attr
RWST
RWST
RWST
RWST
RWST
RWST
RV
Attr
RV
RV
RV
RV
16
0
48Ch, 18Ch
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
16
0
490h, 190h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
16
0
492h, 192h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
Default
Default
Default
000
00h
0h
0
0h
0h
0h
0h
1
1
1
1
1
1
A31DT4: FSB Address [31:4]
A3: FSB Address [3]
Reserved
A39DT32: FSB Address [39:32]
Reserved
F9Msk: FSB Protocol Error
F8Msk: B-INIT
F7Msk: Detected MCERR
F6Msk: Data Parity Error
Reserved
Reserved
Reserved
F2Msk: Unsupported Processor Bus Transaction
F1Msk: Request/Address Parity Error
Description
Description
Description
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