NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 231

• Manufacturer Part Number: NQ5000P S L9TN
• Manufacturer: Intel

Specifications of NQ5000P S L9TN

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Register Description
3.9.23.11
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
AMBPRESENT[1:0][1:0] - FB-DIMM AMB Slot Present Register
These registers control configuration transaction routing to AMB slots on a per FB-
DIMM channel basis. This includes both accesses through memory mapped region
(based on AMBASE register, see
access only, access via device 9, function 0. See
program this register after SPD discovery process. Intel 5000P Chipset MCH will check
this register before it sends actual FB-DIMM AMB configuration transaction.
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
15:0
Bit
RWO
Attr
21
0
66h, 64h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
22
0
66h, 64h
Intel 5000P Chipset
Default
0h
AMBSP: Slot [bit_position] present in the FBD channel
1: Indicates AMB slot addressed by DS[3:0] in decimal = [bit_position] is
present; configuration transaction will be routed to FB-DIMM channel. Bit 15
controls DS[3:0] = 1111b, bit 14 controls DS[3:0] = 1110b,..., bit 0 controls
DS[3:0] = 0000b.
0: AMB slot addressed by DS[3:0] in decimal = [bit_position] is not
populated; no configuration transaction will be sent to FB-DIMM channel.
Section
3.8.3.1) and AMBSELECT (for SMBus/JTAG
Section
Description
3.8.3.3). Software needs to
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