NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 281

• Manufacturer Part Number: NQ5000P S L9TN
• Manufacturer: Intel

Specifications of NQ5000P S L9TN

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

System Address Map
4.2.5
4.3
4.3.1
4.3.2
4.3.3
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
Upper System BIOS Area (F 0000h–F FFFFh)
This area is a single, 64-KB segment, from E 0000h - F FFFFh. This segment can be
assigned read and write attributes through the Intel 5000P Chipset MCH.PAM registers.
The power-on default is set to read/write disabled with transactions forwarded to the
ESI port (Intel 631xESB/632xESB I/O Controller Hub). By manipulating the read/write
attributes, the MCH can “shadow” BIOS into the main system memory. When disabled,
this segment is not remapped.
For locks to this region, the Intel 5000P Chipset will complete them, but does not
guarantee the atomicity of locked access to this range when writes and reads are
mapped to separate destinations. If inbound transactions are expected, the F segment
MUST be programmed to send these transactions to DRAM.
System Memory Area
The low/medium memory regions range from 1MB to 4 GB. It consists of sub-regions
for Firmware, Processor memory mapped functions, and Intel 5000P Chipset specific
registers.
The Extended Memory Area covers from 10 0000h (1 MB) to FFFF FFFFh (4 GB-1)
address range and it is divided into the following regions:
Main System DRAM Address Range (0010 0000h to Top of System Memory)
The address range from 1 MB to the top of system memory is mapped to system
memory address range controlled by the MCH. The Top of Main Memory (TOLM) is
limited to 4-GB DRAM. All accesses to addresses within this range will be forwarded by
the MCH to the system memory.
The MCH provides a maximum system memory address decode space of 4 GB. The
MCH does not remap APIC memory space. The MCH does not limit system memory
address space in hardware.
System Memory
See
15 MB - 16 MB Window (ISA Hole)
The Intel 5000P Chipset does not support the legacy ISA hole between addresses F0
0000h - FF FFFFh. All transactions to this address range are treated as system memory.
Extended SMRAM Space (TSEG)
SMM space allows system management software to partition a region in main memory
to be used by system management software. This region is protected for access by
software other than system management software. When the SMM range is enabled,
memory in this range is not exposed to the Operating System. The Intel 5000P Chipset
• Main System Memory from 1 MB to the Top of Memory; 4-GB system memory.
• PCI Memory space from the Top of Memory to 4 GB with two specific ranges:
• APIC Configuration Space from FEC0 0000h (4 GB–20 MB) to FECF FFFFh and FEE0
• High BIOS area is from 16MB to 4 GB - 1
0000h to FEEF FFFFh
Section
4.3.9.
281