NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 300

no-image

NQ5000P S L9TN

Manufacturer Part Number
NQ5000P S L9TN
Description
Manufacturer
Intel
Datasheet

Specifications of NQ5000P S L9TN

Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
Table 5-3.
Table 5-4.
5.2.1
5.2.1.1
300
Maximum 16 DIMM System Memory Configurations
Note:
Maximum 16 DIMM System Memory Configurations
Note:
Memory Population Rules
DIMM population rules depend on the operating mode of the MC. When operating in
non-mirrored mode the minimum memory upgrade increment is two identical DIMMs
per branch (DIMMs must be identical with respect to size, speed, and organization).
Non-mirrored mode has an exceptional mode that operates with a single DIMM which is
discussed in the following section. When operating in mirrored mode the minimum
upgrade increment is four identical DIMMs
Non-Mirrored Mode Memory Upgrades
The minimum memory upgrade increment is two DIMMs per branch. The DIMMs must
cover the same slot position on both channels. DIMMs that cover a slot position must
be identical with respect to size, speed, and organization. DIMMs that cover adjacent
slot positions need not be identical.
Within a branch memory DIMMs must be populated in slot order; slot 0 is populated
first, slot 1 second, slot 2 third, and slot 3 last. Slot 0 is closest to the MCH.
Section 5-1
depicted in gray (Slot 0 of Branch 0 populated).
DRAM Technology x8
DRAM Technology x4
Single Rank
Dual Rank
The Maximum Capacity Mirrored Mode and Maximum Capacity Non-Mirrored Mode columns represent
the system memory available when all DIMM slots are populated with identical x8 Single Rank (x8DR)
DIMMs using the DRAM Technology indicated.
The Maximum Capacity Mirrored Mode and Maximum Capacity Non-Mirrored Mode columns represent
the system memory available when all DIMM slots are populated with identical x4 Double Rank (x4DR)
DIMMs using the DRAM Technology indicated.
1024 Mb
2048 Mb
1024 Mb
2048 Mb
256 Mb
512 Mb
256 Mb
512 Mb
depicts the minimum two DIMM configuration. The populated DIMMs are
Maximum Capacity
Maximum Capacity
Mirrored Mode
Mirrored Mode
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
16 GB
16 GB
32 GB
32 GB
2 GB
4 GB
8 GB
8 GB
Non-Mirrored Mode
Non-Mirrored Mode
Maximum Capacity
Maximum Capacity
16 GB
32 GB
16 GB
32 GB
64 GB
64 GB
4 GB
8 GB
Functional Description

Related parts for NQ5000P S L9TN