NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 314

• Manufacturer Part Number: NQ5000P S L9TN
• Manufacturer: Intel

Specifications of NQ5000P S L9TN

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Figure 5-9.
314
Code Layout for Dual-Channel Branches
T ra nsfe r 0
T ra nsfe r 1
P acke t
T
R
A
N
S
F
E
R
0
1
2
3
4
5
6
7
8
9
1
0
1
1
C
S
C
S
A
C
S
C
S
B
F
D
N
B
3
3
1
y
1
1
A
B
F
D
N
B
D
S
3
1
A
2
D
S
3
1
B
2
1
y
1
0
C
S
3
A
C
S
3
B
[7:0 ]
C B
x8
D
S
D
D
S
D
F
D
1
N
B
9
S
3
0
A
S
3
0
B
y
C
S
2
A
C
S
2
B
D
S
A
A
D
S
B
B
F
D
1
N
B
y
8
2
8
2
9
2
8
2
9
D
S
3
1
A
D
S
3
1
B
x8
D
D
D
N
S
D
S
2
7
A
S
D
S
2
7
B
F
1
B
y
7
D
D
S
3
0
A
S
3
0
B
D
N
B
D
S
2
5
A
2
6
A
D
S
2
5
B
2
6
B
F
1
y
6
D
S
A
D
S
B
2
9
2
9
x8
D
S
D
S
F
D
N
B
D
S
2
4
A
D
S
2
4
B
1
y
5
D IM M C h a n n e l 1
D
S
A
D
S
B
2
8
2
8
D
D
F
D
N
B
S
2
2
A
2
3
A
S
2
2
B
2
3
B
1
y
4
D
S
2
7
A
D
S
2
7
B
x8
D
S
D
S
A
D
S
D
S
B
F
D
1
N
B
y
3
2
1
2
1
D
S
2
6
A
D
S
2
6
B
D
S
A
A
D
S
B
B
F
D
1
N
B
y
2
1
9
2
0
1
9
2
0
D
S
2
5
A
D
S
2
5
B
x8
D Q [7 1 :0 ]
D
D
D
N
S
D
S
1
8
A
S
D
S
1
8
B
F
1
B
y
1
D
D
S
2
4
A
S
2
4
B
D
N
B
D
S
1
6
A
1
7
A
D
S
1
6
B
1
7
B
F
1
y
0
D
S
A
D
S
B
2
3
2
3
x8
C
S
C
S
A
C
S
C
S
B
F
D
N
B
1
1
0
y
1
1
D
S
A
D
S
B
2
2
2
2
D
0
A
D
0
B
F
D
0
N
B
1
0
S
1
5
A
S
1
5
B
y
D
S
2
1
A
D
S
2
1
B
x8
D
S
D
S
A
D
S
D
S
B
F
D
0
N
B
y
9
1
4
1
4
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
D
S
2
0
A
D
S
2
0
B
D
S
A
A
D
S
B
B
F
D
0
N
B
y
8
1
2
1
3
1
2
1
3
D
D
S
1
9
A
S
1
9
B
x8
D
D
D
N
S
D
S
1
1
A
S
D
S
1
1
B
F
0
B
y
7
D
S
A
D
S
B
1
8
1
8
D
S
A
D
S
B
D
N
B
9
1
0
A
9
1
0
B
F
0
y
6
D
S
A
D
S
B
1
7
1
7
x8
D
S
D
S
A
D
S
D
S
B
F
D
N
B
8
8
0
y
5
D
S
1
6
A
D
S
1
6
B
D
S
6
A
7
A
D
S
6
B
7
B
F
D
0
N
B
4
y
D
S
D
S
5
A
D
S
D
S
5
B
F
D
0
N
B
y
3
D
S
3
A
4
A
D
S
3
B
4
B
F
D
0
N
B
y
2
C
C
[7:0 ]
S
1
A
S
1
B
C B
x8
D
S
D
S
A
D
S
D
S
B
D
N
B
2
2
F
0
y
1
C
S
A
C
S
B
0
0
D
S
A
A
D
S
B
B
F
D
N
B
0
1
0
1
0
y
0
D
S
A
D
S
B
1
5
1
5
x8
S ig n als
y= [P :N ]
D
S
1
4
A
D
S
1
4
B
F B D
D
S
1
3
A
D
S
1
3
B
x8
D IM M C h a n n e l 0
D
S
1
2
A
D
S
1
2
B
D
D
S
1
1
A
S
1
1
B
x8
D
S
A
D
S
B
1
0
1
0
D [n+ 2]
D [n+ 3]
D [1 2 8]
D [1 2 9]
D [1 3 0]
D [1 3 1]
D
S
A
D
S
B
D a ta
9
9
D [0]
D [1]
D [2]
D [3]
B its
x8
D Q [7 1 :0 ]
D [n+ 1 ]
D
S
8
A
D
S
8
B
D [n]
D
S
7
A
D
S
7
B
x8
D
S
6
A
D
S
6
B
F D 0 N B y[0 ]
D
S
A
D
S
B
5
5
D S 0
D S 0
D S 0
D S 0
D S 1
D S 1
D S 0
D S 0
D S 0
D S 0
D S 1
D S 1
x8
[0 ]
[1 ]
[2 ]
[3 ]
[0]
[1]
[4]
[5]
[6 ]
[7 ]
[4 ]
[5 ]
D
N
B
F
0
y
0
D
S
A
D
S
B
4
4
S ig na l
D
S
A
D
S
B
3
3
F B D
x8
D
S
2
A
D
S
2
B
D
S
1
A
D
S
1
B
x8
D
D
S
0
A
S
0
B
Functional Description
D [1 3 1 ] D [1 30 ] D [1 29 ] D [1 2 8]
D Q [3]
D R A M s
F B D B ra n ch 0
D S 0
D [3 ]
D S 0
[3 ]
[7 ]
D Q [2 ]
D S 0
D S 0
D R A M pin s
D [2]
[2 ]
[6 ]
D Q [1 ]
D S 0
D [1 ]
D S 0
[1 ]
[5 ]
D Q [0 ]
D S 0
D S 0
D [0 ]
[0 ]
[4 ]