NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 316

• Manufacturer Part Number: NQ5000P S L9TN
• Manufacturer: Intel

Specifications of NQ5000P S L9TN

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

5.2.12.1
Table 5-8.
316
Closed Loop Thermal Activate Throttle Control
Closed loop thermal activate throttling control uses the temperature of the FB-DIMM
temperature sensor located in the AMB to determine when to throttle. FB-DIMM (AMB
temperature) is returned each sync packet. A thermal throttle period is defined as
window consisting of 1,344 cycles (42*32). The throttling logic in the memory
controller uses this information to limit the number of activates to any DIMM within a
throttling window based on temperature threshold crossing algorithm described later.
Every 42 frames the host controller is required to send a sync
status packet from the AMBs along with temperature information. The AMB component
has two temperature threshold points, T
a.k.a. T1) and T
current temperature of the GB with respect to these thresholds are returned in the
status packet. In addition, the sync and status packets guarantees that enough
transitions occur on each lane to maintain proper bit lock.
1. The sync packet may be dispatched by the MCH at an interval less than 42 frames
depending on the gear ratios, timing, circuit and other parameters. For example, in the
case of the core running at 266 MHz and the DDR2 clock at 333 MHz (4:5), the MCH
can send a SYNC every 32@266 MHz=40 DDR2 333 MHz clocks. This meets the
minimum 42 clock requirement of the FB-DIMM protocol for sync packet generation
frequency.
In each 42 frame period:
FB-DIMM thermal information is returned in the Sync packet as an encoded 2 bit field.
The encoding of this field described in the following table.
AMB Thermal Status Bit Definitions
This data is a duplication of the contents of the AMB.FBDS0 register discussed in the
Gold Bridge Component External Design Specification. These 2 bits are returned for
each AMB during in the Status packet.
2. Electrical throttling is used to prevent silent data corruption by limiting the number
S[2:1]
b. Open loop global activate control becomes active when the number of activates
of activates per rank with in a short sliding window period.
Frames 1-40 are used for normal DRAM traffic: The A slot for DRAM commands and
B/C for write data, as necessary.
Frame 41 is used for configuration commands: If a configuration read, it will appear
in the A slot. If a configuration write it will appear in B/C (which is the only choice).
Frame 42 is used by the Sync packet and occupies the A, B, and C slots.
00
01
10
11
exceeds a programmed number with in a long window period.
Below TEMPLO
Above TEMPLO
Above TEMPMID and falling
Above TEMPMID and rising
Thermal Trip:
mid
thermal conditions of the AMB as follows:
(programmed into the GB.TEMPMID register, a.k.a. T2), and the
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
This field indicates various
low
(programmed into the GB.TEMPLO register,
1
packet, which returns a
Functional Description