NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 364

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NQ5000P S L9TN

Manufacturer Part Number
NQ5000P S L9TN
Description
Manufacturer
Intel
Datasheet

Specifications of NQ5000P S L9TN

Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
5.15.2.8
5.15.2.9
5.15.3
i
Figure 5-28. DWORD Configuration Read Protocol (SMBus Block Write / Block Read,
Figure 5-29. DWORD Configuration Write Protocol (SMBus Block Write, PEC Disabled)
364
Status Field
For a read cycle, the returned data is preceded by one byte of status. The following
table shows how the status byte bits are defined.
Unsupported Access Addresses
It is possible for an SMBus master to program an unsupported bit combination into the
ADDR registers. The MCH does not support such usage, and may not gracefully
terminate such accesses.
SMB Transaction Pictographs
The Intel 5000P Chipset MCH SMBus target interface is targeted to enterprise domains.
The enterprise domain is an extension of the original SMBus desktop domain. The
following drawings are included to describe the SMBus enterprise transactions.
PEC Disabled)
Position
S
S
Sr
S
Reg Number [7:0]
A
3:1
6
5
4
0
0110_000
7
0110_000
0110_000
0110_000
Data[23:16]
Internal Time-out.
0 = SMBus request is completed within 2 ms internally
1 = SMBus request is not completed in 2 ms internally.
Ignored.
Internal Master Abort.
0 = No Internal Master Abort Detected.
1 = Detected an Internal Master Abort.
Internal Target Abort.
0 = No Internal Target Abort Detected.
1 = Detected an Internal Target Abort.
Ignored.
Successful.
0 = The last SMBus transaction was not completed successfully.
1 = The last SMBus transaction was completed successfully.
W A
W A
W A
R A
CLOCK STRETCH
A
Cmd = 11001110
Cmd = 11000010
Cmd = 11000010
Byte Count = 5
Data[16:8]
A P
A
A
A
A
A
Byte Count = 8
Byte Count = 4
Data[7:0]
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
Status
A
CLOCK STRETCH
A
A
Bus Number
Bus Number
Data[31:24]
A P
A
Description
Device/Function
A
A
Device/Function
Data[23:16]
A
Reg Number[15:8] A
A
A
Reg Number[15:0] A
Data[15:8]
Reg Number [7:0]
Functional Description
A
Data[7:0]
A
Data[31:24]
N P

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