NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 43

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NQ5000P S L9TN

Manufacturer Part Number
NQ5000P S L9TN
Description
Manufacturer
Intel
Datasheet

Specifications of NQ5000P S L9TN

Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
Signal Description
2.11.1
2.12
2.12.1
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
Intel 5000P Customer Reference Platform (SRP) Reset
Topology
Typical platform level reset implementation is described in the Dual-Core Intel
Processor 5000 series (1066 MHz) and Intel
Guide (PDG).
Signals Used as Straps
Functional Straps
The PEWIDTH signals are used to determine the widths of the 7 PCI Express ports.
PEWIDTH[3:0]
Signal Name
Power/
Type
Other
PCI Express Port Width Strapping Pins:
§
®
5000 Sequence Chipsets Platform Design
Description
®
Xeon
®
43

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