MCZ33991EG Freescale, MCZ33991EG Datasheet

MCZ33991EG

Manufacturer Part Number
MCZ33991EG
Description
Manufacturer
Freescale
Datasheet

Specifications of MCZ33991EG

Operating Current
6mA
Operating Temperature Classification
Automotive
Package Type
SOIC W
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCZ33991EG
Manufacturer:
FREESCALE
Quantity:
20 000
Freescale Semiconductor
Technical Data
© Freescale Semiconductor, Inc., 2006. All rights reserved.
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
Gauge Driver Integrated Circuit
controlled, dual stepper motor gauge driver Integrated Circuit (IC).
This monolithic IC consists of four dual output H-Bridge coil drivers
and the associated control logic. Each pair of H-Bridge drivers is used
to automatically control the speed, direction and magnitude of current
through the two coils of a two-phase instrumentation stepper motor,
similar to an MMT licensed AFIC 6405.
requiring distributed and flexible stepper motor gauge driving. The
device also eases the transition to stepper motors from air core
motors by emulating the air core pointer movement with little
additional processor bandwidth utilization.
Features
This 33991 is a single packaged, Serial Peripheral Interface (SPI)
This device is ideal for use in automotive instrumentation systems
The device has many attractive features including:
• MMT-Licensed Two-Phase Stepper Motor Compatible
• Minimal Processor Overhead Required
• Fully Integrated Pointer Movement and Position State Machine
• 4096 Possible Steady State Pointer Positions
• 340° Maximum Pointer Sweep
• Linear 4500°
• Maximum Pointer Velocity of 400°
• Analog Microstepping (12 Steps/Degree of Pointer Movement)
• Pointer Calibration and Return to Zero
• SPI Controlled 16-Bit Word
• Calibratable Internal Clock
• Low Sleep Mode Current
• Pb-Free Packaging Designated by Suffix Code EG
with Air Core Movement Emulation
2
Figure 1. 33991 Simplified Application Diagram
Regulator
5.0 V
MCU
V PWR
VPWR
VDD
RT
RS
CS
SCLK
SI
SO
33991
COS1+
COS2+
SIN1+
COS1-
SIN2+
COS2-
SIN1-
SIN2-
GND
Motor 1
Motor 2
MCZ33991EG/R2
MC33991DW/R2
Device
GAUGE DRIVER INTEGRATED CIRCUIT
ORDERING INFORMATION
EG SUFFIX (PB-FREE)
98ASB42344B
24-PIN SOICW
DW SUFFIX
Document Number: MC33991
Temperature
33991
-40 to 125°C
Range (T
A
)
Rev. 2.0, 11/2006
Package
SOICW

Related parts for MCZ33991EG

MCZ33991EG Summary of contents

Page 1

... Low Sleep Mode Current • Pb-Free Packaging Designated by Suffix Code EG Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. © Freescale Semiconductor, Inc., 2006. All rights reserved. MC33991DW/R2 MCZ33991EG/R2 V PWR 33991 VPWR SIN1+ SIN1- 5 ...

Page 2

... Figure 2. 33991 Simplified Internal Block Diagram 33991 2 INTERNAL BLOCK DIAGRAM VPWR Internal Reference COS0 SIN0 COS1 H-BRIDGE & CONTROL ILIM Under & Over Voltage Over Temp SIN1 Detect GND COS0+ COS0- SIN0+ SIN0- COS1+ COS1- RTZ RTZ SIN1+ SIN1- Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 3

... The master ensures data is available on the falling edge of SCLK. Multiplexed Output. This multiplexed output pin of the non-driven coil during an RTZ event. 13 RTZ Voltage. This SPI and logic power supply input will work with 5.0 V supplies Analog Integrated Circuit Device Data Freescale Semiconductor PIN CONNECTIONS COS0 COS1+ COS0 2 23 ...

Page 4

... H-Bridge Output. This is the output pin of a half bridge, designed to source or sink current. The H-Bridge 24 COS1+ pins linearly drive the sine and cosine coils of two separate stepper motors to provide four-quadrant operation. 33991 4 Definitions Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 5

... Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. ...

Page 6

... Min V 6.5 PWR I — PWR(ON) — I PWSLP1 I PWRSLP2 V 26 PWROV V 5.0 PWRUV V 4 — DDUV I — DD(OFF) I — DD(ON) Analog Integrated Circuit Device Data Typ Max Unit — 26 4.0 6.0 µ 5.6 6.2 V 5.0 5.5 V — 4 µA 1.0 1.8 mA Freescale Semiconductor ...

Page 7

... Output Flyback Clamp Output Current Limit (Out = VSTP6) Over temperature Shutdown (8) Over temperature Hysteresis Notes 8. Not 100 percent tested. Analog Integrated Circuit Device Data Freescale Semiconductor STATIC ELECTRICAL CHARACTERISTICS < 5.25 V, -40°C < T < 150°C, unless otherwise noted Symbol Min VST6 4 ...

Page 8

... DD J Symbol Min V 2 — — IN(HYST DWN 0.8VDD SOH V — SOL S -5 OLK C — — SO Analog Integrated Circuit Device Data Typ Max Unit — — V — 0.8 V 100 — mV — 20 µA — 20 µA — — V 0.2 0 µ — Freescale Semiconductor ...

Page 9

... Maximum specified time for the 33991 is the minimum guaranteed time needed from the micro. 13. The minimum and maximum value will vary proportionally to the internal clock tolerance. These are not 100 percent tested. Analog Integrated Circuit Device Data Freescale Semiconductor < 5.25 V, -40°C < T < 150°C, unless otherwise noted) DD ...

Page 10

... MHz — 50 167 ns — 50 167 ns — — — — — — — — — — 3.0 µs — — 5.0 µs — — 5.0 µs — — 145 ns — 1.3 4.0 µs — 65 105 ns Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 11

... Figure 3. Input Timing Switching Characteristics 3.5V SCLK SO 0.2 VDD Low-to-High SO 0.7 VDD High-to-Low Figure 4. Valid Data Delay Time and Valid Time Waveforms Analog Integrated Circuit Device Data Freescale Semiconductor TIMING DIAGRAMS TwSCLKh TrSI TSIsu TwSCLKl TSI(hold) Don’t Care Valid TrSI TfSI ...

Page 12

... Data is shifted on the rising edge of the SCLK signal. The SO pin will remain in a high impedance state until the CS pin is put into a logic low state. FUNCTIONAL DESCRIPTION diagrams shown in Figures 4 and 5. Description Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 13

... SPI. This section provides a detailed description of all registers accessible via serial interface. The various registers control the behavior of this device. A message is transmitted by the master beginning with the MSB (D15) and ending with the LSB (D0). Multiple messages can be transmitted in succession to accommodate Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 14

... Address: 000 PE11: PE5 These bits must be transmitted as logic [0] for valid PECR commands. PE4—Clock Calibration Frequency Selector • Maximum f=1MHz (for 8us calibration pulse PE4 PE3 PE2 PE1 PE0 Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 15

... D10 0 P011 P010 Write Analog Integrated Circuit Device Data Freescale Semiconductor • Enable MAXIMUM VELOCITY REGISTER (VELR) SI Address 001—Gauge Maximum Velocity Register is used to set a maximum velocity for each gauge. See Table 4. Bits D7: D0 contain a position value from 1–255 representative of the table position value. The table value becomes the maximum velocity until it is changed to another value ...

Page 16

... RTZ pointer speed away from these frequencies. Bits D3: D0 determine the time spent at each full step during an RTZ event. The step time associated with each bit RZ4 RZ3 RZ2 RZ1 RZ0 Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 17

... Analog Integrated Circuit Device Data Freescale Semiconductor bit the indicator of an accumulator exceeding the decision threshold of 0, and the pointer is assumed to still be moving. Similarly, if the sign bit is logic [1] after a full step of integration, the accumulator value is negative and the pointer is assumed to be stopped. The integrator and accumulator are initialized after each full step ...

Page 18

... Initial Accumulator Value = (-16xPV)-1 -1 -17 -33 -49 -65 “ “ “ -4081 OD6 OD5 OD4 OD3 OD2 OD1 ST6 ST5 ST4 ST3 ST2 ST1 is within normal range exceeded PWRUV Analog Integrated Circuit Device Data Freescale Semiconductor OD0 ST0 ...

Page 19

... During the deceleration phase, the motor should not exceed the maximum deceleration. A Analog Integrated Circuit Device Data Freescale Semiconductor • Return to Zero disabled • Return to Zero enabled successful ST1–Gauge 1 Junction over temperature. A logic [1] on ...

Page 20

... B5 -0.707 - 222 DE -0.5 - 247 F7 -0.259 - 255 FF - 247 F7 0.259 COS Current 8-Bit Value 8-Bit Value Flow (DEC 255 + 247 + 222 + 181 + 128 + 128 - 181 - 222 - 247 -1 - 255 - 247 - 222 - 181 - 128 - Analog Integrated Circuit Device Data Freescale Semiconductor (HEX ...

Page 21

... In the ROM, this time is quantized to multiples of the system clock by rounding upwards, ensuring acceleration never exceeds the allowed value. The actual velocity and acceleration is calculated from the time step actually used. Using Analog Integrated Circuit Device Data Freescale Semiconductor - 222 DE 0.5 - 181 B5 0 ...

Page 22

... Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 23

... Analog Integrated Circuit Device Data Freescale Semiconductor Velocity Time Between Velocity Position Steps (µs) (µSteps/s) 98 310 3238.97 99 309 3255.60 100 307 3272.14 101 306 3288.60 102 304 3304 ...

Page 24

... Time Between Velocity Position Steps (µs) (µSteps/s) 208 212 4729.79 209 212 4741.19 210 211 4752.57 211 211 4763.92 212 210 4775.24 213 210 4786.53 214 209 4797.80 215 209 4800.00 D0 8us Calibration Pulse Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 25

... RTZR bit D1. RTZCR bits D12:D5 are written to preload the accumulator with a predetermined value assuring an accurate pointer stall Analog Integrated Circuit Device Data Freescale Semiconductor POINTER DECELERATION WAVESHAPING Constant acceleration and deceleration of the pointer results in choppy movements when compared to air core movements ...

Page 26

... Default mode refers to the state of the 33991 after an internal or external reset prior to SPI communication. An internal reset occurs during V is initiated by the RST pin driven to a logic [0]. With the exception of the RTZ power-up. An external reset DD full step time, all of the specific pin Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 27

... RTZ, and the pointers are calibrated with the RTZ command. Steps 1-9 are Analog Integrated Circuit Device Data Freescale Semiconductor Note: There is no way to distinguish between an over voltage fault and an under voltage fault from the status bits. If ...

Page 28

... Return one gauge at a time to the zero stop using Select the RTZ accumulator bits that will clock Check the Status of the RTZ by sending the null Check the Status of the RTZ by sending the null Analog Integrated Circuit Device Data Freescale Semiconductor Reference Figure # Table 3 Figure 7 ...

Page 29

... PECR command to monitor SO bit ST2 - Bit PE12 is the null command. Is ST2 logic 0? If not then gauge 0 still returning. Null command should be resent. Analog Integrated Circuit Device Data Freescale Semiconductor Description PWR PWR bit ST6 logic 1? If so, then RTZ after valid V PWR ...

Page 30

... Disable both Gauges and go to standby bit PE0: PE1 are used to disable the gauges. 20 PECR Put the device to sleep. - RST pin is pulled to logic 0. 33991 30 Description Check the Status of the RTZ by sending the null Analog Integrated Circuit Device Data Freescale Semiconductor Reference Figure # Tables 7-8 Table 3 Table 12 Table 3 ...

Page 31

... Command_Gauge(0x80,0x02); /* Step 7 */ Command_Gauge(0x10,0x00); /* Read Status until RTZ is done */ While ((status & 0x04 {Command_Gauge(0x10,0x00);} Analog Integrated Circuit Device Data Freescale Semiconductor TIMING DESCRIPTIONS AND DIAGRAMS SAMPLE CODE /* Enable Gauges */ /* Clock Cal bit set */ /* Enable GDIC CS pin - PORTS2 */ /* Wait for 8 uSec calibration */ /* Disable GDIC CS pin - PORTS2 */ ...

Page 32

... If ST4 is logic 1 then Gauge 0 has moved to the first microstep */ 33991 32 /* Send RTZ to Gauge Null Read to get status */ /* Send velocity */ /* Send position to gauge0 */ /* Send position to gauge1 */ /* Send position to Gauge Send position to Gauge Send position to Gauge Send position to Gauge 1 */ Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 33

... While ((SP0SR & 0x80) == 0); status = SP0DR; PORTS = 0x04 Motorola Semiconductor Products Sector */ /* October 4, 2002 */ Analog Integrated Circuit Device Data Freescale Semiconductor TIMING DESCRIPTIONS AND DIAGRAMS /* Null Read to get status */ /* Send RTZ to Gauge Null Read to get status */ /* Send RTZ to Gauge Null Read to get status */ ...

Page 34

... PACKAGE DIMENSIONS PACKAGE DIMENSIONS For the most current package revision, visit www.freescale.com and perform a keyword search using the “98A” listed below. 33991 34 PACKAGE DIMENSIONS PACKAGE DIMENSIONS DW SUFFIX EG SUFFIX (PB-FREE) 24-PIN PLASTIC PACKAGE 98ASB42344B REV. F Analog Integrated Circuit Device Data Freescale Semiconductor ...

Page 35

... Implemented Revision History page 11/2006 2.0 • Updated to current Freescale format and style • Added MCZ33991EG/R2 to the ordering Information • Removed Peak Package Reflow Temperature During Reflow (solder reflow) parameter from Maximum ratings on page Analog Integrated Circuit Device Data Freescale Semiconductor REVISION HISTORY 5 ...

Page 36

... Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “ ...

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