EE80C188XL12 S F12 Intel, EE80C188XL12 S F12 Datasheet - Page 46

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EE80C188XL12 S F12

Manufacturer Part Number
EE80C188XL12 S F12
Description
Manufacturer
Intel
Datasheet

Specifications of EE80C188XL12 S F12

Family Name
Intel186
Device Core
80188
Device Core Size
16b
Frequency (max)
12MHz
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
68
Package Type
PLCC
Lead Free Status / RoHS Status
Compliant
80C186XL 80C188XL
INSTRUCTION SET SUMMARY
Shaded areas indicate instructions not available in 8086 8088 microsystems
NOTE
46
CONTROL TRANSFER (Continued)
RET
Within segment
Within seg adding immed to SP
Intersegment
Intersegment adding immediate to SP
JE JZ
JL JNGE
JLE JNG
JB JNAE
JBE JNA
JP JPE
JO
JS
JNE JNZ
JNL JGE
JNLE JG
JNB JAE
JNBE JA
JNP JPO
JNO
JNS
JCXZ
LOOP
LOOPZ LOOPE
LOOPNZ LOOPNE
ENTER
L
L
L
LEAVE
INT
Type specified
Type 3
INTO
IRET
BOUND
Clock cycles shown for byte transfers For word operations add 4 clock cycles for all memory transfers
e
e
l
e
e
e
1
0
1
e
e
e
e
Jump on sign
e
Jump on overflow
e
e
e
Interrupt
Jump on not sign
Return from CALL
Jump on not overflow
e
e
e
Interrupt return
e
Interrupt on overflow
Jump on CX zero
Loop CX times
Jump on equal zero
e
e
e
e
e
e
e
e
e
e
Enter Procedure
Leave Procedure
Jump on parity parity even
Detect value out of range
Jump on less not greater or equal
Jump on less or equal not greater
Jump on not equal not zero
Jump on not less greater or equal
Jump on not less or equal greater
Jump on not par par odd
Jump on below not above or equal
Jump on below or equal not above
Jump on not below above or equal
Jump on not below or equal above
e
Loop while zero equal
e
Function
Loop while not zero equal
0 1 1 1 0 0 0 0
1 1 0 0 0 0 1 1
1 1 0 0 0 0 1 0
1 1 0 0 1 0 1 1
1 1 0 0 1 0 1 0
0 1 1 1 0 1 0 0
0 1 1 1 1 1 0 0
0 1 1 1 1 1 1 0
0 1 1 1 0 0 1 0
0 1 1 1 0 1 1 0
0 1 1 1 1 0 1 0
0 1 1 1 1 0 0 0
0 1 1 1 0 1 0 1
0 1 1 1 1 1 0 1
0 1 1 1 1 1 1 1
0 1 1 1 0 0 1 1
0 1 1 1 0 1 1 1
0 1 1 1 1 0 1 1
0 1 1 1 0 0 0 1
0 1 1 1 1 0 0 1
1 1 1 0 0 0 1 1
1 1 1 0 0 0 1 0
1 1 1 0 0 0 0 1
1 1 1 0 0 0 0 0
1 1 0 0 1 0 0 0
1 1 0 0 1 0 0 1
1 1 0 0 1 1 0 1
1 1 0 0 1 1 0 0
1 1 0 0 1 1 1 0
1 1 0 0 1 1 1 1
0 1 1 0 0 0 1 0
(Continued)
mod reg r m
data-low
data-low
data-low
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
type
Format
data-high
data-high
data-high
L
22
80C186XL
a
Cycles
33–35
Clock
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
5 15
6 16
6 16
6 16
48 4
16(n
16
18
22
25
15
25
47
45
28
8
b
1)
26
80C188XL
a
Cycles
33–35
Clock
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
4 13
5 15
6 16
6 16
6 16
48 4
20(n
20
22
30
33
19
29
47
45
28
8
b
1)
if INT taken
taken LOOP
Comments
taken JMP
LOOP not
if INT not
JMP not
taken
taken
taken

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