SN74LS221NG ON Semiconductor, SN74LS221NG Datasheet - Page 3

• Manufacturer Part Number: SN74LS221NG
• Manufacturer: ON Semiconductor

Specifications of SN74LS221NG

• Logic Family: LS
• High Level Output Current: -400uA
• Low Level Output Current: 8mA
• Quiescent Current: 11uA
• Number Of Elements: 2
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (typ): 5V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Technology: Bipolar
• Abs. Propagation Delay Time: 80ns
• Operating Supply Voltage (min): 4.75V
• Lead Free Status / RoHS Status: Compliant

determined by t
within their minimum and maximum valves and the duty
cycle is less than 50%. This pulse width is essentially
independent of V
pulse widths varies typically no more than ±0.5% from
device to device.
period of the input pulse, rises above 50%, the output pulse
width will become shorter. If the duty cycle varies between
low and high valves, this causes the output pulse width to
vary in length, or jitter. To reduce jitter to a minimum, R
should be as large as possible. (Jitter is independent of C
With R
cycle approaches 90%.
LS123, it should be remembered that they are not
functionally identical. The LS123 is retriggerable so that the
output is dependent upon the input transitions once it is high.
This is not the case for the LS221. Also note that it is
recommended to externally ground the LS123 C
However, this cannot be done on the LS221.
high-stability one shot. The output pulse width, t
varied over 9 decades of timing by proper selection of the
external timing components, R
independent of the input slew rate. Although all three inputs
have this Schmitt-trigger effect, only the B input should be
used for very long transition triggers (≥1.0 μV/s). High
immunity to V
internal latching circuitry. However, standard V
bypassing is strongly recommended.
Once in the pulse trigger mode, the output pulse width is
If the duty cycle, defined as being 100
Although the LS221 is pin-for-pin compatible with the
The SN74LS221 is a dual, monolithic, non-retriggerable,
Pulse triggering occurs at a voltage level and is, therefore,
The LS221 has four basic modes of operation.
ext
= 100K, jitter is not appreciable until the duty
W
CC
= R
CC
noise (typically 1.5 V) is achieved by
ext
and temperature variations. Output
C
ext
In2, as long as R
ext
and C
@
ext
t W
.
T
ext
where T is the
and C
OPERATIONAL NOTES
W
ext
http://onsemi.com
can be
ext
ext
pin.
are
CC
ext
).
3
Clear Mode: If the clear input is held low, irregardless of
Inhib-
it Mode:
Pulse Trigger
Mode:
Overriding
Clear Mode: If the Q output is high, it may be forced low
the previous output state and other input
states, the Q output is low.
If either the A input is high or the B input is
low, once the Q output goes low, it cannot
be retriggered by other inputs.
A transition of the A or B inputs as indicated
in the functional truth table will trigger the Q
output to go high for a duration determined
by the t
go low for a corresponding length of time.
The Clear input may also be used to trigger
an output pulse, but special logic precondi-
tioning on the A or B inputs must be done
as follows:
Once triggered, as long as the output re-
mains high, all input transitions (except
overriding Clear) are ignored.
by bringing the clear input low.
Following any output triggering action
using the A or B inputs, the A input must
be set high OR the B input must be set
low to allow Clear to be used as a trigger.
Inputs should then be set up per the truth
table (without triggering the output) to
allow Clear to be used a trigger for the
output pulse.
If the Clear pin is routinely being used to
trigger the output pulse, the A or B inputs
must be toggled as described above be-
fore and between each Clear trigger
event.
W
equation described above; Q will