FSTD16450MTD Fairchild Semiconductor, FSTD16450MTD Datasheet

FSTD16450MTD

Manufacturer Part Number

FSTD16450MTD

Description

Manufacturer

Fairchild Semiconductor

Datasheet

1.FSTD16450MTD.pdf (11 pages)

Specifications of FSTD16450MTD

Logic Family

FST

Number Of Bits

Technology

CMOS

High Level Output Current

-128mA

Low Level Output Current

128mA

Operating Temp Range

-40C to 85C

Operating Temperature Classification

Industrial

Operating Supply Voltage (min)

Operating Supply Voltage (typ)

Operating Supply Voltage (max)

5.5V

Pin Count

Mounting

Surface Mount

Lead Free Status / RoHS Status

Compliant

Current page: 1 of 11
Download datasheet (411Kb)

FSTD16450GX

(Note 1)

FSTD16450MTD

FSTD16450

Configurable 4-Bit to 20-Bit Bus Switch

with Selectable Level Shifting

General Description

The Fairchild Universal Bus Switch FSTD16450 provides

4-bit, 5-bit, 8-bit, 10-bit, 16-bit, 20-bit of high-speed CMOS

TTL-compatible bus switching. The low on resistance of

the switch allows inputs to be connected to outputs without

adding propagation delay or generating additional ground

bounce noise.

The FSTD16450 is designed to allow “customer” configura-

tion control of the enable connections. The device is orga-

nized as either a 4-bit, 5-bit, 10-bit or 20-bit bus switch. 8-

bit and 16-bit configurations are also achievable (see Func-

tional Description). The device's bit configuration is chosen

through select pin logic. (see Truth Table). When OE

LOW, Port A

the switch is OPEN.

Another key device feature is the addition of a level shifting

select pin, “S

standard N-MOS switch. When S

is integrated into the circuit allowing for level shifting

between 5V inputs and 3.3V outputs.

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Note 1: BGA package available in Tape and Reel only.

UHC

Order Number

is a trademark of Fairchild Semiconductor Corporation.

is connected to Port B

”. When S

Package Number

(Preliminary)

BGA54A

MTD56

is LOW, the device behaves as a

is HIGH, a diode to V

. When OE

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

[Tape and Reel]

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

DS500438

is HIGH,

Features

Applications Note

Select pins S

user configurable control pins. The AC performance of

these pins has not been characterized or tested. Switching

of these select pins during system operation may tempo-

rarily disrupt output logic states and/or enable pin controls.

4 switch connection between two ports

Voltage level shifting

Minimal propagation delay through the switch

Low l

Zero bounce in flow-through mode

Control inputs compatible with TTL level

Also packaged in plastic Fine-Pitch Ball Grid Array

(FBGA) (Preliminary)

Package Description

, S

are intended to be used as static

January 2001

Revised August 2001

www.fairchildsemi.com

Related parts for FSTD16450MTD

FSTD16450MTD Summary of contents

Page 1

... Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 1) (Preliminary) [Tape and Reel] FSTD16450MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Connection Diagrams Pin Assignments for TSSOP Pin Assignments for FBGA (Top Thru View) www.fairchildsemi.com Pin Descriptions Pin Name Description Bus Switch Enables 1 2 1A, 2A Bus A 1B, 2B Bus Bit Configuration ...

Page 3

Logic Diagrams 20-Bit Configuration (Configuration 1) 5-Bit Configuration (Configuration 3) 10-Bit Configuration (Configuration 2) 4-Bit Configuration (Configuration 4) 3 www.fairchildsemi.com ...

Page 4

Functional Description The device can also be configured and 16-bit device by grounding the unused pins in Configurations 2 and 1 respectively. The 8-bit configuration may also be achieved by tying two of the 4-bit enables from ...

Page 5

Truth Tables (Continued Configuration Inputs ...

Page 6

Absolute Maximum Ratings Supply Voltage ( Switch Voltage (V ) (Note Input Control Pin Voltage (V ) (Note Input Diode Current ( Output (I ) ...

Page 7

AC Electrical Characteristics Symbol Parameter Propagation Delay Bus-to-Bus PHL PLH (Note Output Enable Time PZH PZL Output Disable Time PHZ PLZ Output ...

Page 8

AC Loading and Waveforms www.fairchildsemi.com Note: Input driven by 50 source terminated in 50 Note: C includes load and stray capacitance L Note: Input Frequency 1.0 MHz, t FIGURE 1. AC Test Circuit FIGURE 2. AC Waveforms 8 500 ns ...

Page 9

FIGURE 3. 9 www.fairchildsemi.com ...

Page 10

Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide www.fairchildsemi.com Package Number BGA54A Preliminary 10 ...

Page 11

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 ...

Related keywords

FSTD16450MTD datasheet
FSTD16450MTD data sheet
FSTD16450MTD pdf datasheet
FSTD16450MTD component
FSTD16450MTD part
FSTD16450MTD distributor
FSTD16450MTD RoHS
FSTD16450MTD datasheet download