HDMP-2634 Avago Technologies US Inc., HDMP-2634 Datasheet - Page 19

• Manufacturer Part Number: HDMP-2634
• Manufacturer: Avago Technologies US Inc.

Specifications of HDMP-2634

• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Not Compliant

Table 2. Pin Definitions for HDMP-2634, continued
Name
TX[0]
TX[1]
TX[2]
TX[3]
TX[4]
TX[5]
TX[6]
TX[7]
TX[8]
TX[9]
RX[0]
RX[1]
RX[2]
RX[3]
RX[4]
RX[5]
RX[6]
RX[7]
RX[8]
RX[9]
TXCAP0
TXCAP1
RXCAP0
RXCAP1
V
V
V
V
VREFT
VREFR
V
GND
GND_TXA
GND_RXA
19
CC
CC
CC
CC
CC
_TXA
_RXA
_TXHS
_SSTL
Pin
02
03
04
06
07
08
09
11
12
13
45
44
43
41
40
39
38
36
35
34
17
16
48
49
20
28
57
59
54
18
50
60
63
05
47
37
42
21
25
58
15
51
Type
I-SSTL2
O-SSTL2
C
C
S
S
S
S
S
S
S
S
S
S
Signal
Data Inputs: One 10-bit, encoded character to the SO serial outputs. TX[0] is the first
bit transmitted. TX[0] is the least significant bit.
Data Outputs: One 10-bit encoded character from one of the SI serial inputs. RX[0] is
the first bit received. When RX_LOS =1, there is a loss of input signal at SI , and these
outputs are held static at logic 1. Refer to RX_LOS pin definition for more details.
Loop Filter Capacitor: A loop filter capacitor for the internal transmit PLL must be
connected across the TXCAP0 and TXCAP1 pins. (typical value is 0.1 F)
Loop Filter Capacitor: A loop filter capacitor for the internal receive PLL must be
connected across the RXCAP0 and RXCAP1 pins. (typical value is 0.1 F)
Logic Power Supply: Normally 3.3 volts. Used for internal PECL logic.
Analog Power Supply: Normally 3.3 volts. Used to provide a clean supply line for
transmit PLL and high speed analog cells.
Analog Power Supply: Normally 3.3 volts. Used to provide a clean supply line for
receive PLL and high speed analog cells.
High Speed Supply: Normally 3.3 volts. Used only for the high speed transmit cell
(HS_OUT). Noise on this line should be minimized for best operation.
Voltage Reference Input: Used with I-SSTL2 inputs to the HDMP-2634. (Figure 11.)
Voltage Reference Output: Used with O-SSTL2 outputs from the HDMP-2634. (Figure 11.)
SSTL I/O Supply Voltage for SSTL_2. Normally 3.3 V. All necessary voltages for
SSTL_2 operation are internally generated.
Logic Ground: Normally 0 volts. This ground is used for internal PECL logic.
Analog Ground: Normally 0 volts. Used to provide a clean ground plane for the PLL
and high-speed analog cells.
Analog Ground: Normally 0 volts. Used to provide a clean ground plane for the
receiver PLL and high-speed analog cells.