LFXP2-40E-6FN672C

Manufacturer Part NumberLFXP2-40E-6FN672C
DescriptionIC DSP 40KLUTS 540I/O 672FPBGA
ManufacturerLattice
LFXP2-40E-6FN672C datasheets

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Specifications of LFXP2-40E-6FN672C

Number Of Logic Elements/cells*Number Of Labs/clbs*
Total Ram Bits906240Number Of I /o540
Number Of Gates-Voltage - Supply1.14 V ~ 1.26 V
Mounting Type*Operating Temperature0°C ~ 85°C
Package / Case*Lead Free Status / Rohs StatusLead free / RoHS Compliant
Other names220-1129  
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Lattice Semiconductor
Programming and Erase Flash Supply Current
Symbol
I
Core Power Supply Current
CC
I
Auxiliary Power Supply Current
CCAUX
I
PLL Power Supply Current (per PLL)
CCPLL
I
Bank Power Supply Current (per Bank)
CCIO
I
V
Power Supply Current
CCJ
CCJ
1. For further information on supply current, please see TN1139,
2. Assumes all outputs are tristated, all inputs are configured as LVCMOS and held at the V
3. Frequency 0 MHz (excludes dynamic power from FPGA operation).
4. A specific configuration pattern is used that scales with the size of the device; consists of 75% PFU utilization, 50% EBR, and 25% I/O con-
figuration.
5. Bypass or decoupling capacitor across the supply.
6. T
= 25°C, power supplies at nominal voltage.
J
7. In fpBGA and ftBGA packages the PLLs are connected to and powered from the auxiliary power supply. For these packages, the actual
auxiliary supply current is the sum of I
auxiliary power supply.
8. When programming via JTAG.
Over Recommended Operating Conditions
Parameter
Device
XP2-5
XP2-8
XP2-17
XP2-30
XP2-40
XP2-5
XP2-8
7
XP2-17
XP2-30
XP2-40
8
Power Estimation and Management for LatticeXP2
and I
. For csBGA, PQFP and TQFP packages the PLLs are powered independent of the
CCAUX
CCPLL
3-5
DC and Switching Characteristics
LatticeXP2 Family Data Sheet
1, 2, 3, 4, 5
Typical
6
(25°C, Max. Supply)
17
21
28
36
50
64
66
83
87
88
0.1
5
14
Devices.
or GND.
CCIO
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA

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