LFXP2-40E-6FN672C

Manufacturer Part NumberLFXP2-40E-6FN672C
DescriptionIC DSP 40KLUTS 540I/O 672FPBGA
ManufacturerLattice
LFXP2-40E-6FN672C datasheets

Availability: By request

International delivery:

Warranty: 60 days

Shipping & payment terms

Added to cart

 

Specifications of LFXP2-40E-6FN672C

Number Of Logic Elements/cells*Number Of Labs/clbs*
Total Ram Bits906240Number Of I /o540
Number Of Gates-Voltage - Supply1.14 V ~ 1.26 V
Mounting Type*Operating Temperature0°C ~ 85°C
Package / Case*Lead Free Status / Rohs StatusLead free / RoHS Compliant
Other names220-1129  
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
Page 61
62
Page 62
63
Page 63
64
Page 64
65
Page 65
66
Page 66
67
Page 67
68
Page 68
69
Page 69
70
Page 70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
Page 66/92

Download datasheet (2Mb)Embed
PrevNext
Lattice Semiconductor
EBR Timing Diagrams
Figure 3-6. Read/Write Mode (Normal)
CLKA
CSA
WEA
ADA
A0
t
t
SU
DIA
D0
DOA
Note: Input data and address are registered at the positive edge of the clock and output data appears after the positive edge of the clock.
Figure 3-7. Read/Write Mode with Input and Output Registers
CLKA
CSA
WEA
ADA
t
DIA
DOA (Regs)
A1
A0
H
D1
t
CO_EBR
Invalid Data
A0
A1
A0
t
SU
H
D0
D1
Mem(n) data from previous read
output is only updated during a read cycle
3-22
DC and Switching Characteristics
LatticeXP2 Family Data Sheet
A1
A0
t
t
CO_EBR
CO_EBR
D0
D0
D1
A1
A0
t
t
COO_EBR
COO_EBR
D1
D0