ICS932S401EFT IDT, Integrated Device Technology Inc, ICS932S401EFT Datasheet

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ICS932S401EFT

Manufacturer Part Number
ICS932S401EFT
Description
IC TIMING CTRL HUB PROGR 56-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Timing Control Hubr
Datasheet

Specifications of ICS932S401EFT

Input
Crystal
Output
Clock
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Frequency-max
400MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
932S401EFT
Recommended Application:
CK410B clock for Intel-based servers
Output Features:
932S401 Functionality
0921G—08/24/09
FS_C
1. FS_B and FS_C are three-level inputs. Please see V
the Input/Supply/Common Output Parameters Table for correct values.
Also refer to the Test Clarification Table.
2. FS_A is a low-threshold input. Please see the V
specifications in the Input/Supply/Common Output Parameters Table for correct values.
0
0
0
0
1
1
1
1
1
4 - 0.7V current-mode differential CPU pairs
5 - 0.7V current-mode differential SRC pair
4 - PCI (33MHz)
3 - PCICLK_F, (33MHz) free-running
1 - 48MHz
2 - REF, 14.318MHz
FS_B
0
0
1
1
0
0
1
1
1
Integrated
Circuit
Systems, Inc.
Programmable Timing Control Hub for Intel-based Servers
FS_A
0
1
0
1
0
1
0
1
2
266.67 100.00
133.33 100.00
200.00 100.00
166.67 100.00
333.33 100.00
100.00 100.00
400.00 100.00
CPU
MHz
SRC
MHz
Reserved
33.33 14.318
33.33 14.318
33.33 14.318
33.33 14.318
33.33 14.318
33.33 14.318
33.33 14.318
MHz
PCI
IL_FS
REF
MHz
IL_FS
and V
and V
IH_FS
48.000
48.000
48.000
48.000
48.000
48.000
48.000
MHz
U
SB
IH_FS
specifications in
Key Specifications:
Features/Benefits:
Pin Configuration
CPU cycle-cycle jitter: < 50ps
SRC cycle-cycle jitter: < 125ps
PCI cycle-cycle jitter: < 500ps
CPU output skew: < 50ps
SRC output skew: < 250ps
± 300ppm frequency accuracy on all outputs except
48MHz
± 100ppm frequency accuracy on 48MHz
Supports spread spectrum modulation, 0 to -0.5%
down spread
Uses external 14.318MHz crystal and external load
capacitors for low ppm synthesis error
CPU clocks independent of SRC/PCI clocks
D2/D3 SMBus address
PCICLK_F0 9
PCICLK_F1 10
PCICLK_F2 11
SRCCLKC0 17
SRCCLKC1 18
SRCCLKC2 22
SRCCLKC3 23
SRCCLKC4 27
SRCCLKT0 16
SRCCLKT1 19
SRCCLKT2 21
SRCCLKT3 24
SRCCLKT4 26
GNDSRC 20
PCICLK0 3
PCICLK1 4
PCICLK2 5
PCICLK3 6
VDDSRC 15
VDDSRC 25
VDDSRC 28
GNDPCI 2
GNDPCI 7
VDDPCI 1
VDDPCI 8
GND48 14
VDD48 12
48MHz 13
56-pin SSOP & TSSOP
56 FS_C/TEST_SEL
55 REF0
54 REF1
53 VDDREF
52 X1
51 X2
50 GNDREF
49 FS_B/TEST_MODE
48 FS_A
47 VDDCPU
46 CPUCLKT0
45 CPUCLKC0
44 VDDCPU
43 CPUCLKT1
42 CPUCLKC1
41 GNDCPU
40 CPUCLKT2
39 CPUCLKC2
38 VDDCPU
37 CPUCLKT3
36 CPUCLKC3
35 VDDA
34 GNDA
33 IREF
32 NC
31 Vtt_PwrGd#/PD
30 SDATA
29 SCLK
ICS932S401

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ICS932S401EFT Summary of contents

Page 1

Integrated Circuit Systems, Inc. Programmable Timing Control Hub for Intel-based Servers Recommended Application: CK410B clock for Intel-based servers Output Features: • 0.7V current-mode differential CPU pairs • 0.7V current-mode differential SRC pair • PCI ...

Page 2

Integrated Circuit Systems, Inc. Pin Description Pin # PIN NAME 1 VDDPCI 2 GNDPCI 3 PCICLK0 4 PCICLK1 5 PCICLK2 6 PCICLK3 7 GNDPCI 8 VDDPCI 9 PCICLK_F0 10 PCICLK_F1 11 PCICLK_F2 12 VDD48 13 48MHz 14 GND48 15 VDDSRC ...

Page 3

Integrated Circuit Systems, Inc. Pin Description (Continued) Pin # PIN NAME 29 SCLK 30 SDATA 31 Vtt_PwrGd#/ IREF 34 GNDA 35 VDDA 36 CPUCLKC3 37 CPUCLKT3 38 VDDCPU 39 CPUCLKC2 40 CPUCLKT2 41 GNDCPU 42 CPUCLKC1 43 ...

Page 4

Integrated Circuit Systems, Inc. General Description ICS932S401 is a main clock synthesizer for CK410-generation Intel server platforms. ICS932S401 is driven with a 14.318MHz crystal. It generates CPU outputs up to 400MHz and PCI-Express clocks at 100 or 200 MHz. The ...

Page 5

Integrated Circuit Systems, Inc. Absolute Max Symbol Parameter VDD_A 3.3V Core Supply Voltage VDD_In 3.3V Logic Input Supply Voltage Ts Storage Temperature Tambient Ambient Operating Temp Tcase Case Temperature Input ESD protection ESD prot human body model Electrical Characteristics - ...

Page 6

Integrated Circuit Systems, Inc. Electrical Characteristics - CPU 0.7V Current Mode Differential Pair 70° 3.3 V +/-5 PARAMETER SYMBOL Current Source Output Zo Impedance Voltage High VHigh Voltage Low VLow ...

Page 7

Integrated Circuit Systems, Inc. Electrical Characteristics - SRC 0.7V Current Mode Differential Pair 70° 3.3 V +/-5 PARAMETER SYMBOL Current Source Output Zo Impedance Voltage High VHigh Voltage Low VLow Max ...

Page 8

Integrated Circuit Systems, Inc. Electrical Characteristics - PCICLK/PCICLK_F 70° 3.3 V +/-5 PARAMETER SYMBOL Long Accuracy ppm T Clock period period Absolute Min/Max Clock T abs period Clk High Time ...

Page 9

Integrated Circuit Systems, Inc. Electrical Characteristics - REF-14.318MHz 70° 3.3 V +/-5 PARAMETER SYMBOL Long Accuracy ppm T Clock period period Absolute Min/Max Clock T abs period Output High Voltage ...

Page 10

Integrated Circuit Systems, Inc. Single-ended Output Terminations ICS932S401 SEPP Output Buffer (Single Ended Push Pull) SEPP Output Buffer (Single Ended Push Pull) The singled-ended outputs of the ICS 932S401E default to a drive strength of 2 loads. The REF clocks ...

Page 11

Integrated Circuit Systems, Inc. General SMBus serial interface information for the ICS932S401 How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • Controller (host) sends the ...

Page 12

Integrated Circuit Systems, Inc. SMBus Table: SRC Output Enable Register Byte 0 Pin # Name NA SRCCLK7 Enable Bit 7 NA SRCCLK6 Enable Bit 6 NA SRCCLK5 Enable Bit 5 26,27 SRCCLK4 Enable Bit 4 23,24 SRCCLK3 Enable Bit 3 ...

Page 13

Integrated Circuit Systems, Inc. SMBus Table: CPU and SRC Stop and Power Down Mode Drive Control Register Byte 4 Pin # Name CPUCLK3 PD Drive Bit 7 36,37 CPUCLK2 PD Drive Bit 6 39,40 CPUCLK1 PD Drive Bit 5 42,43 ...

Page 14

Integrated Circuit Systems, Inc. SMBus Table: Byte Count Register Byte 8 Pin # Name - BC7 Bit 7 - BC6 Bit 6 - BC5 Bit 5 - BC4 Bit 4 - BC3 Bit 3 - BC2 Bit 2 - BC1 ...

Page 15

Integrated Circuit Systems, Inc. SMBus Table: CPU Frequency Control Register Byte 11 Pin # Name - CPU N Div8 Bit 7 - CPU N Div9 Bit 6 - CPU M Div5 Bit 5 - CPU M Div4 Bit 4 CPU ...

Page 16

Integrated Circuit Systems, Inc. SMBus Table: SRC Frequency Control Register Byte 15 Pin # Name - SRC N Div8 Bit 7 - SRC N Div9 Bit 6 - SRC M Div5 Bit 5 - SRC M Div4 Bit 4 SRC ...

Page 17

Integrated Circuit Systems, Inc. SMBus Table: CPU Programmable Output Divider Register Byte 19 Pin # Name - CPUDiv3 Bit 7 - CPUDiv2 Bit 6 - CPUDiv1 Bit 5 - CPUDiv0 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ...

Page 18

Integrated Circuit Systems, Inc. REF Drive Strength Functionality Byte6, Byte 10, Byte 10, bit 4 bit 1 bit 0 REF1 ...

Page 19

Integrated Circuit Systems, Inc. PD, Power Down asynchronous active high input used to shut off all clocks cleanly prior to system power down. When PD is asserted, all clocks will be driven low before turning off the ...

Page 20

Integrated Circuit Systems, Inc. PD De-assertion The time from the de-assertion until power supply ramps to get stable clocks will be less than 1.8ms. If the drive mode control bit for PD tristate is programmed to '1' ...

Page 21

Integrated Circuit Systems, Inc INDEX INDEX AREA AREA 45° 45° 0921G—08/24/09 c SYMBOL ...

Page 22

Integrated Circuit Systems, Inc INDEX INDEX AREA AREA Ordering Information Part / Order Number Shipping Packaging 932S401EFLF 932S401EFLFT 932S401EGLF 932S401EGLFT “LF” suffix to the part number denotes ...

Page 23

Integrated Circuit Systems, Inc. Revision History Rev. Issue Date Description 1. Updated Electrical Characterisitcs tables with typical data A 5/2/2005 2. Added Notes on Termination of Single-ended outputs B 5/18/2006 1. Changed Max CPU Skew from 100ps to 50ps. C ...

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