ICS932S208DFT IDT, Integrated Device Technology Inc, ICS932S208DFT Datasheet

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ICS932S208DFT

Manufacturer Part Number
ICS932S208DFT
Description
IC TIMING HUB CTRL PROGR 56-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Timing Control Hubr
Datasheet

Specifications of ICS932S208DFT

Input
Crystal
Output
Clock
Frequency - Max
200MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Frequency-max
200MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
932S208DFT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS932S208DFT
Manufacturer:
ICS
Quantity:
4 000
Programmable Timing Control Hub
Gen P4
Recommended Application:
CK409B clock, Intel Yellow Cover part, Server Applications
Output Features:
Key Specifications:
Functionality
IDT
B6b5 FS_A FS_B
0
1
TM
4 - 0.7V current-mode differential CPU pairs
1 - 0.7V current-mode differential SRC pair
7 - PCI (33MHz)
3 - PCICLK_F, (33MHz) free-running
1 - USB, 48MHz
1 - DOT, 48MHz
2 - REF, 14.318MHz
4 - 3V66, 66.66MHz
1 - VCH/3V66, selectable 48MHz or 66MHz
CPU/SRC outputs cycle-cycle jitter < 125ps
3V66 outputs cycle-cycle jitter < 250ps
PCI outputs cycle-cycle jitter < 250ps
CPU outputs skew: < 100ps
+/- 300ppm frequency accuracy on CPU & SRC clocks
Programmable Timing Control Hub
0
0
0
1
1
1
0
0
1
1
MID Ref/N
MID
0
1
0
1
0
1
0
1
TM
CPU
MHz
Hi-Z
100
200
133
166
200
400
266
333
Processor
0
100/200 66.66 33.33 14.318
100/200 66.66 33.33 14.318
100/200 66.66 33.33 14.318
100/200 66.66 33.33 14.318
100/200 66.66 33.33 14.318
100/200 66.66 33.33 14.318
100/200 66.66 33.33 14.318
100/200 66.66 33.33 14.318
Ref/N
SRC
MHz
Hi-Z
1
Ref/N
3V66
MHz
Hi-Z
TM
2
for Next Gen P4
Ref/N
MHz
Hi-Z
PCI
3
Ref/N
MHz
REF
Hi-Z
4
U
TM
Ref/N
SB/DOT
48.00
48.00
48.00
48.00
48.00
48.00
48.00
48.00
MHz
Hi-Z
Processor
5
TM
1
Features/Benefits:
Pin Configuration
for Next
Supports tight ppm accuracy clocks for Serial-ATA
Supports spread spectrum modulation, 0 to -0.5%
down spread and +/- 0.25% center spread
Supports CPU clks up to 400MHz in test mode
Uses external 14.318MHz crystal
PCICLK_F0
PCICLK_F1
PCICLK_F2
VDD3V66 24
PCICLK0 12
PCICLK1 13
PCICLK2 14
PCICLK3 15
PCICLK4 18
PCICLK5 19
PCICLK6 20
VDDREF
VDDPCI 10
VDDPCI 16
3V66_0 22
3V66_1 23
3V66_2 26
3V66_3 27
SCLK 28
REF0
REF1
56-pin SSOP & TSSOP
GND 6
GND 11
GND 17
GND 25
PD# 21
X1
X2
1
2
3
4
5
7
8
9
ICS932S208
56 FS_B
55 VDDA
54 GNDA
53 GND
52 IREF
51 FS_A
50 CPUCLKT3
49 CPUCLKC3
48 VDDCPU
47 CPUCLKT2
46 CPUCLKC2
45 GND
44 CPUCLKT1
43 CPUCLKC1
42 VDDCPU
41 CPUCLKT0
40 CPUCLKC0
39 GND
38 SRCCLKT
37 SRCCLKC
36 VDD
35 Vtt_PWRGD#
34 VDD48
33 GND
32 48MHz_DOT
31 48MHz_USB
30 SDATA
29 3V66_4/VCH
DATASHEET
0743G—01/26/10

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ICS932S208DFT Summary of contents

Page 1

Programmable Timing Control Hub TM Gen P4 Processor Recommended Application: CK409B clock, Intel Yellow Cover part, Server Applications Output Features: • 0.7V current-mode differential CPU pairs • 0.7V current-mode differential SRC pair • PCI ...

Page 2

ICS932S208 Programmable Timing Control Hub Pin Description PIN # PIN NAME 1 REF0 2 REF1 3 VDDREF GND 7 PCICLK_F0 8 PCICLK_F1 9 PCICLK_F2 10 VDDPCI 11 GND 12 PCICLK0 13 PCICLK1 14 PCICLK2 15 ...

Page 3

ICS932S208 Programmable Timing Control Hub Pin Description (continued) PIN # PIN NAME 29 3V66_4/VCH 30 SDATA 31 48MHz_USB 32 48MHz_DOT 33 GND 34 VDD48 35 Vtt_PWRGD# 36 VDD 37 SRCCLKC 38 SRCCLKT 39 GND 40 CPUCLKC0 41 CPUCLKT0 42 VDDCPU ...

Page 4

ICS932S208 Programmable Timing Control Hub General Description ICS932S208 follows Intel CK409B Yellow Cover specification. This clock synthesizer provides a single chip solution for next generation P4 Intel processors and Intel chipsets. ICS932S208 is driven with a 14.318MHz crystal. It generates ...

Page 5

ICS932S208 Programmable Timing Control Hub Absolute Maximum Ratings Symbol Parameter VDD_A 3.3V Core Supply Voltage VDD_In 3.3V Logic Input Supply Voltage Ts Storage Temperature Tambient Ambient Operating Temp Tcase Case Temperature Input ESD protection human body model ESD prot Electrical ...

Page 6

ICS932S208 Programmable Timing Control Hub Electrical Characteristics - CPU & SRC 0.7V Current Mode Differential Pair 70° 3.3 V +/-5 PARAMETER SYMBOL Current Source Output Zo Impedance Output High Voltage ...

Page 7

ICS932S208 Programmable Timing Control Hub Electrical Characteristics - 3V66 Mode: 3V66 [4: 70° 3.3 V +/-5 PARAMETER SYMBOL Long Accuracy ppm T Clock period period V Output High Voltage V ...

Page 8

ICS932S208 Programmable Timing Control Hub Electrical Characteristics - 48MHz DOT Clock 70° 3.3 V +/-5 PARAMETER SYMBOL Long Accuracy ppm T Clock period period V Output High Voltage OH Output Low ...

Page 9

ICS932S208 Programmable Timing Control Hub Electrical Characteristics - VCH, 48MHz, USB 70° 3.3 V +/-5 PARAMETER SYMBOL Long Accuracy Clock period Output High Voltage Output Low Voltage Output High Current Output ...

Page 10

ICS932S208 Programmable Timing Control Hub Electrical Characteristics - REF-14.318MHz 70° 3.3 V +/-5 PARAMETER SYMBOL Long Accuracy Clock period Output High Voltage Output Low Voltage Output High Current Output Low Current ...

Page 11

ICS932S208 Programmable Timing Control Hub 2 General I C serial interface information for the ICS932S208 How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • Controller ...

Page 12

ICS932S208 Programmable Timing Control Hub Table: Read-Back Register Byte 0 Pin # - Bit 7 RESERVED - RESERVED Bit 6 - RESERVED Bit 5 Bit 4 - RESERVED Bit 3 - RESERVED - RESERVED Bit 2 - ...

Page 13

ICS932S208 Programmable Timing Control Hub Table: Output Control Register Byte 3 Pin # 7,8,9,12,13,14,15, PCI_Stop# Bit 7 18,19,20,37,38, Bit Bit 5 Bit Bit 3 Bit 2 14 Bit ...

Page 14

ICS932S208 Programmable Timing Control Hub Table: Output Control and Fix Frequency Register Byte 6 Pin # 1,2,7,8,9,12,13,14, 15,18,19,20,22,23,2 Bit 7 Test Clock Mode 6,27,29,31,32,37,38 ,40,41,43,44,46,47 Bit 6 - RESERVED Bit 5 40,41,43,44,46,47 FS Testmode 37,38 Bit 4 ...

Page 15

ICS932S208 Programmable Timing Control Hub PCI Stop Functionality The PCI_STOP# signal active low input controlling PCI and SRC outputs. If PCIF (2:0) and SRC clocks can be set to be free-running through I2C programming. Outputs set to ...

Page 16

ICS932S208 Programmable Timing Control Hub PD#, Power Down PD asynchronous active low input used to shut off all clocks cleanly prior to clock power. When PD# is asserted low all clocks will be driven low before turning off ...

Page 17

ICS932S208 Programmable Timing Control Hub PD# De-assertion The time from the de-assertion of PD# or until power supply ramps to get stable clocks will be less than 1.8ms. If the drive mode control bit for PD# tristate is programmed to ...

Page 18

ICS932S208 Programmable Timing Control Hub Differential Clock Tristate To minimize power consumption, CPU[2:0] clock outputs are individually configurable through SMBus to be driven or tristated during PwrDwn# and CPU_Stop# mode and the SRC clock is configurable to be driven or ...

Page 19

ICS932S208 Programmable Timing Control Hub N E1 INDEX INDEX AREA AREA Ordering Information 932S208yFLNT Example: XXXX Designation for tape and reel packaging Annealed Lead Free Package Type Revision Designator (will ...

Page 20

ICS932S208 Programmable Timing Control Hub N E1 INDEX INDEX AREA AREA Ordering Information 932S208yGLNT Example: XXXX Designation for tape and reel packaging Annealed Lead Free Package Type Revision ...

Page 21

ICS932S208 Programmable Timing Control Hub Revision History Rev. Issue Date Description F 12/2/2008 Removed ICS prefix from ordering information G 1/26/2010 Updated document template TM TM for Next Gen P4 TM Processor Innovate with IDT and accelerate your future networks. ...

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