IDT5T9302PGGI IDT, Integrated Device Technology Inc, IDT5T9302PGGI Datasheet

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IDT5T9302PGGI

Manufacturer Part Number
IDT5T9302PGGI
Description
IC CLK BUFFER 1:2 LVDS 20-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
TERABUFFER™ IIr
Type
Fanout Buffer (Distribution), Multiplexerr
Datasheet

Specifications of IDT5T9302PGGI

Number Of Circuits
1
Ratio - Input:output
2:2
Differential - Input:output
Yes/Yes
Input
CML, eHSTL, HSTL, LVDS, LVEPECL, LVPECL, LVTTL
Output
LVDS
Frequency - Max
450MHz
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Frequency-max
450MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
5T9302PGGI
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization and/or qualification.
Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
2.5V LVDS, 1:2 CLOCK BUFFER
TERABUFFER™ II
General Description
The IDT5T9302 2.5V differential clock buffer is a user-selectable
differential input to two LVDS outputs. The fanout from a
differential input to two LVDS outputs reduces loading on the
preceding driver and provides an efficient clock distribution
network. The IDT5T9302 can act as a translator from a differential
HSTL, eHSTL, LVEPECL (2.5V), LVPECL (3.3V), CML, or LVDS
input to LVDS outputs. A single-ended 3.3V / 2.5V LVTTL input
can also be used to translate to LVDS outputs. The redundant
input capability allows for an asynchronous change-over from a
primary clock source to a secondary clock source. Selectable
reference inputs are controlled by SEL.
The IDT5T9302 outputs can be asynchronously enabled/disabled.
When disabled, the outputs will drive to the value selected by the
GL pin. Multiple power and grounds reduce noise.
Applications
Pin Assignment
IDT™ LVDS CLOCK BUFFER TERABUFFER™ II
Clock distribution
4.4mm x 6.5mm x 1.0mm package body
GND
GND
20-Lead TSSOP
SEL
V
V
PD
Q1
Q1
DD
DD
nc
G
G Package
Top View
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
A2
GND
Q2
A1
A2
V
Q2
V
A1
DD
DD
1
Features
Guaranteed low skew: 5ps (typical)
Very low duty cycle distortion: 20ps (typical)
High speed propagation delay: 1.35ns (typical)
Up to 450MHz operation
Selectable inputs
Hot insertable and over-voltage tolerant inputs
3.3V/2.5V LVTTL, HSTL eHSTL, LVEPECL (2.5V), LVPECL
(3.3V), CML or LVDS input interface
Selectable differential inputs to two LVDS outputs
Power-down mode
2.5V V
-40°C to 85°C ambient operating temperature
Available in TSSOP package
DD
IDT5T9302 REV. A APRIL 29, 2008
PRELIMINARY
IDT5T9302

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IDT5T9302PGGI Summary of contents

Page 1

LVDS, 1:2 CLOCK BUFFER TERABUFFER™ II General Description The IDT5T9302 2.5V differential clock buffer is a user-selectable differential input to two LVDS outputs. The fanout from a differential input to two LVDS outputs reduces loading on the preceding driver ...

Page 2

IDT5T9302 2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ II Block Diagram SEL IIDT™ LVDS CLOCK BUFFER TERABUFFER™ PRELIMINARY OUTPUT CONTROL OUTPUT CONTROL IDT5T9302 REV. A APRIL 29, 2008 Q1 Q1 ...

Page 3

IDT5T9302 2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ II Table 1. Pin Descriptions Name Type A[1:2] Input Adjustable A[1:2] Input Adjustable G Input LVTTL GL Input LVTTL Q[1:2] Output LVDS Q{1:2} Output LVDS SEL Input LVTTL PD Input LVTTL V Power ...

Page 4

IDT5T9302 2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ II Function Tables Table 3A. Gate Control Output Table Control Output GL G Q[1: Toggling 0 1 LOW 1 0 Toggling 1 1 HIGH Table 3B. Input Selection Table Selection SEL ...

Page 5

IDT5T9302 2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ Electrical Characteristics Table 4A. LVDS Power Supply DC Characteristics Symbol Parameter I Quiescent V Power Supply Current DDQ DD I Total Power V Supply Current TOT DD I Total Power Down ...

Page 6

IDT5T9302 2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ II Table 4D. LVDS DC Characteristics Symbol Parameter Differential Output Voltage for the V OT(+) True Binary State Differential Output Voltage for the V OT(–) False Binary State Change in V Between ∆V ...

Page 7

IDT5T9302 2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ II Table 5B. eHSTL AC Differential Input Characteristics, T Symbol Parameter (1) V Input Signal Swing DIF V Differential Input Signal Crossing Point X D Duty Cycle H V Input Timing Measurement Reference ...

Page 8

IDT5T9302 2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ II Table 5D. LVDS Differential Input AC Characteristics, T Symbol Parameter (1) V Input Signal Swing DIF V Differential Input Cross Point Voltage X D Duty Cycle H V Input Timing Measurement Reference ...

Page 9

IDT5T9302 2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ II (1,5) Table 5E. AC Characteristics Symbol Parameter tsk(o) Same Device Output Pin-to-Pin Skew (3) tsk(p) Pulse Skew (4) tsk(pp) Part-to-Part Skew tp Propagation Delay, Low-to-High LH tp Propagation Delay, High-to-Low HL (6) ...

Page 10

IDT5T9302 2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ II Differential AC Timing Waveforms Output Propagation and Skew Waveforms 1/ [1:2] [1:2] t PLH SK( NOTE 1: Pulse skew is calculated using ...

Page 11

IDT5T9302 2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ II Power Down Timing NOTE recommended that outputs be disabled before entering power-down mode. It ...

Page 12

IDT5T9302 2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ II Test Circuit for Differential Input V Pulse Generator V Table 6A. Differential Input Test Conditions Symbol V = 2.5V ± 0. Crossing of A and A THI IIDT™ LVDS CLOCK ...

Page 13

IDT5T9302 2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ II Test Circuit for DC Outputs and Power Down Tests V A Pulse Generator D.U.T. A Test Circuit for Propagation, Skew, and Gate Enable/Disable Timing A Pulse Generator A Table 6B. Differential Input ...

Page 14

... Package Device Type Table 7. Ordering Information Part/Order Number Marking 5T9302PGI IDT5T9302PGI 5T9302PGI8 IDT5T9302PGI 5T9302PGGI IDT5T9302PGGI 5T9302PGGI8 IDT5T9302PGGI IIDT™ LVDS CLOCK BUFFER TERABUFFER™ Process I PG PGG 5T9302 Package 20 Lead TSSOP 20 Lead TSSOP “Lead-Free” 20 Lead TSSOP “Lead-Free” 20 Lead TSSOP ...

Page 15

IDT5T9302 2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ II Contact Information: www.IDT.com Sales 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT © 2008 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the ...

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