ICS85301AKLF IDT, Integrated Device Technology Inc, ICS85301AKLF Datasheet

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ICS85301AKLF

Manufacturer Part Number
ICS85301AKLF
Description
IC MUX 2:1 DIFF-LVPECL 16-VFQFPN
Manufacturer
IDT, Integrated Device Technology Inc
Type
Multiplexerr
Series
HiPerClockS™r
Datasheet

Specifications of ICS85301AKLF

Number Of Circuits
1
Ratio - Input:output
2:1
Differential - Input:output
Yes/Yes
Input
CML, LVDS, LVPECL
Output
LVPECL
Frequency - Max
3GHz
Voltage - Supply
2.375 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-VFQFN
Frequency-max
3GHz
Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
3000MHz
Output Logic Level
LVPECL
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465V
Package Type
VFQFN
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
85301AKLF
2:1, DIFFERENTIAL-
TO-LVPECL MULTIPLEXER
B
IDT
G
tial inputs accept LVPECL, CML as well as LVDS levels. The
ICS85301 is packaged in a small 3mm x 3mm 16 VFQFN
package, making it ideal for use on space constrained boards.
HiPerClockS™
CLK_SEL
IC S
nPCLK0
nPCLK1
LOCK
PCLK0
PCLK1
ENERAL
/ ICS
V
BB
2:1, LVPECL MULTIPLEXER
D
The ICS85301 is a high performance 2:1 Differen-
tial-to-LVPECL Multiplexer and a member of the
HiPerClockS™ family of High Performance Clock
Solutions from IDT. The ICS85301 can also per-
form differential translation because the differen-
IAGRAM
D
ESCRIPTION
0
1
Q
nQ
1
F
2:1 LVPECL MUX
One LVPECL output
Two differential clock inputs can accept: LVPECL, LVDS, CML
Maximum input/output frequency: 3GHz
Translates LVCMOS/LVTTL input signals to LVPECL levels by
using a resistor bias network on nPCLK0, nPCLK0
Propagation delay: 490ps (maximum)
Part-to-part skew: 150ps (maximum)
Additive phase jitter, RMS: 0.009ps (typical)
Full 3.3V or 2.5V operating supply
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
EATURES
P
3mm x 3mm x 0.95 package body
IN
nPCLK0
nPCLK1
PCLK0
PCLK1
CLK_SEL
4.4mm x 5.0mm x 0.92mm
A
nPCLK0
nPCLK1
PCLK0
PCLK1
SSIGNMENT
16-Lead VFQFN
V
V
1
2
3
4
16-Lead TSSOP
nc
CC
ICS85301
BB
16 15 14 13
package body
5
ICS85301 REV. B DECEMBER 22, 2006
ICS85301
K Package
G Package
Top View
Top View
6
1
2
3
4
5
6
7
8
7
16
15
14
13
12
11
10
9
8
12
11
10
9
nc
V
V
V
V
Q
nQ
V
EE
EE
CC
EE
EE
V
Q
nQ
V
EE
EE
ICS85301

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ICS85301AKLF Summary of contents

Page 1

DIFFERENTIAL- TO-LVPECL MULTIPLEXER G D ENERAL ESCRIPTION The ICS85301 is a high performance 2:1 Differen- tial-to-LVPECL Multiplexer and a member of the IC S HiPerClockS™ family of High Performance Clock HiPerClockS™ Solutions from IDT. The ICS85301 can also per- ...

Page 2

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER ABLE IN ESCRIPTIONS ...

Page 3

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER BSOLUTE AXIMUM ATINGS Supply Voltage Inputs, V -0. Outputs Continuous Current 50mA Surge Current 100mA Package Thermal Impedance VFQFN 51.5°C/W (0 lfpm) 16 TSSOP ...

Page 4

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER T 4E. LVPECL DC C ABLE HARACTERISTICS ...

Page 5

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase noise plot ...

Page 6

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER P ARAMETER LVPECL V EE -1.3V ± 0.165V 3. UTPUT OAD EST IRCUIT V CC nPCLK0, nPCLK1 V Cross Points PP nPCLK0, nPCLK1 ...

Page 7

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER nPCLK0 PCLK0 nPCLK1 PCLK1 PD2 t PD1 tsk(i) tsk( PD1 I S NPUT KEW IDT ™ / ICS ™ 2:1, LVPECL MULTIPLEXER Clock Outputs - t | PD2 O R UTPUT ...

Page 8

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER IRING THE IFFERENTIAL NPUT TO Figure 1A shows an example of the differential input that can be wired to accept single ended LVCMOS levels. The reference voltage level V generated from the device ...

Page 9

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER LVPECL LOCK NPUT NTERFACE The PCLK /nPCLK accepts LVPECL, CML, SSTL and other differential signals. Both V and V SWING input requirements. Figures show interface V CMR examples for the ...

Page 10

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER ECOMMENDATIONS FOR NUSED I : NPUTS PCLK/nPCLK I : NPUT For applications not requiring the use of a differential input, both the PCLK and nPCLK pins can be left floating. Though not required, ...

Page 11

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER T 2.5V LVPECL O ERMINATION FOR Figure 4A and Figure 4B show examples of termination for 2.5V LVPECL driver. These terminations are equivalent to terminating 2V. For V = 2.5V, the V ...

Page 12

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER PPLICATION CHEMATIC XAMPLE Figure 6 shows an example of ICS85301 application schematic. This device can accept different types of input signal. In this example, the input is driven by a LVDS driver. The ...

Page 13

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER This section provides information on power dissipation and junction temperature for the ICS85301. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS85301 is the sum of the core ...

Page 14

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER 3. Calculations and Equations. The purpose of this section is to derive the power dissipated into the load. LVPECL output driver circuit and termination are shown in Figure calculate worst case power dissipation ...

Page 15

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER T 7A ABLE VS IR LOW ABLE FOR JA Multi-Layer PCB, JEDEC Standard Test Boards T 7B ABLE VS IR LOW ABLE FOR FOR JA Single-Layer PCB, JEDEC ...

Page 16

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER ACKAGE UTLINE UFFIX FOR Index Area N Top View D IDT ™ / ICS ™ 2:1, LVPECL MULTIPLEXER VFQFN EAD Seating Plane Anvil Singulation E2 E2 ...

Page 17

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER ACKAGE UTLINE UFFIX FOR IDT ™ / ICS ™ 2:1, LVPECL MULTIPLEXER TSSOP EAD T 8B ABLE ACKAGE IMENSIONS ...

Page 18

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER ABLE RDERING NFORMATION ...

Page 19

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER ...

Page 20

ICS85301 2:1, DIFFERENTIAL-TO-LVPECL MULTIPLEXER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 ...

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