W48C111-16H Cypress Semiconductor Corp, W48C111-16H Datasheet

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W48C111-16H

Manufacturer Part Number
W48C111-16H
Description
CLOCK GEN FREQ MOD 28-SSOP
Manufacturer
Cypress Semiconductor Corp
Type
Fanout Distribution, Spread Spectrum Clock Generatorr
Datasheet

Specifications of W48C111-16H

Pll
Yes
Input
Clock, Crystal
Output
Clock
Number Of Circuits
1
Ratio - Input:output
1:10
Differential - Input:output
No/No
Frequency - Max
100MHz
Divider/multiplier
Yes/No
Voltage - Supply
2.375 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Frequency-max
100MHz/66MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1402

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Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
W48C111-16H
Quantity:
240
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Manufacturer:
CYPRESS
Quantity:
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Manufacturer:
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Part Number:
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Features
Key Specifications
Supply Voltages: ....................................... V
Cypress Semiconductor Corporation
• Maximized EMI suppression using Cypress’s Spread
• Power-on default to spread mode
• Two copies of CPU output
• Six copies of PCI output (synchronous w/CPU outputs)
• One copy of 48-MHz USB output
• One Buffered copy of 14.318-MHz input reference signal
• Supports 100-MHz or 66-MHz CPU operation
• Power management control input pins
• Low Frequency Test Mode
• Available in 28-pin SSOP (209 mil)
SEL100/66#
CPU_STOP#
PCI_STOP#
PWR_DWN#
Block Diagram
Spectrum technology
X1
X2
PLL 1
PLL 2
XTAL
OSC
Power
Down
Control
÷2/÷3
PLL Ref Freq
Control
Frequency Generator for Integrated Core Logic
Control
Clock
Stop
Clock
Stop
V
DDQ3
DDQ2
3901 North First Street
= 3.3V±5%
= 2.5V±5%
PRELIMINARY
VDDQ3
48MHz
VDDQ3
REF
VDDQ2
CPU0
CPU1
VDDQ3
PCI_F
PCI1
PCI2
PCI4
PCI5
PCI3
VDDQ3
CPU0:1 Skew: ............................................................ 175 ps
CPU0:1 Cycle to Cycle Jitter: ..................................... 200 ps
PCI_F, PCI1:5 Skew: ...................................................500 ps
PCI_F, PCI1:5 Cycle to Cycle Jitter: ............................ 250 ps
CPU to PCI Skew: ........................ 1.5 to 4.0 ns (CPU Leads)
Output Duty Cycle: .................................................... 45/55%
PCI_F, PCI Edge Rate: .............................................. >1 V/ns
CPU_STOP#, PWR_DWN#, PCI_STOP#: 250-k
resistor
Table 1. Pin Selectable Frequency
SEL100/66#
Pin Configuration
VDDQ3
VDDQ3
VDDQ3
PCI_F
GND
PCI1
PCI2
PCI3
PCI4
PCI5
GND
GND
0
1
X1
X2
San Jose
10
11
12
13
14
1
2
3
4
5
6
7
8
9
66.6 MHz
CPU(0:1)
100 MHz
CA 95134
28
27
26
25
24
23
22
21
20
19
18
17
16
15
November 2, 1999, rev. **
W48C111-16
33.3
33.3
PCI
GND
VDDQ3
REF
VDDQ2
CPU0
CPU1
GND
VDDQ3
GND
PCI_STOP#
CPU_STOP#
PWR_DWN#
48MHz
SEL100/66#
408-943-2600
Spread%
±0.5%
±0.5%
pull-up

Related parts for W48C111-16H

W48C111-16H Summary of contents

Page 1

... PCI4 PCI5 GND VDDQ3 GND VDDQ3 PCI_F PCI1 PCI2 PCI3 VDDQ3 PCI4 PCI5 VDDQ3 48MHz • 3901 North First Street • San Jose W48C111-16 pull-up CPU(0:1) PCI Spread% 66.6 MHz 33.3 ±0.5% 100 MHz 33.3 ±0. GND 2 27 VDDQ3 3 26 REF ...

Page 2

... HIGH, CPU and PCI outputs start with a full clock cycle at full operating frequency (3 ms maximum latency). Power Connection: Connected to 3.3V supply. Power Connection: Power supply for CPU0:1 output buffer. Connected to 2.5V or 3.3V. Ground Connection: Connect all ground pins to the common system ground plane. 2 W48C111-16 ...

Page 3

... Figure 2 details the Cypress spreading pattern. Cypress does offer options with more spread and greater EMI reduc- tion. Contact your local Sales representative for details on these devices. Spread Spectrum clocking is always active on this device. S SFT G Typ ical C lock F requ Hz) - Figure 2. Typical Modulation Profile 3 W48C111-16 ...

Page 4

... X1 input threshold voltage (typical DDQ3 4. The W48C111-16 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal is 14 pF; this includes typical stray capacitance of short PCB traces to crystal input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected). ...

Page 5

... CPU leads PCI output. Assumes full supply voltage reached within 1 ms from power-up. Short cycles exist prior to frequency stabilization. Average value during switching transition. Used for determining series termination value. 5 W48C111-16 CPU = 66.6 MHz CPU = 100 MHz Min. Typ. Max. Min. Typ. Max ...

Page 6

... Assumes full supply voltage reached within 1 ms from power-up. Short cycles exist prior to fre- quency stabilization. Average value during switching transition. Used for determining series termination value. Package Name Package Type H 28-pin SSOP (209 mils) 6 W48C111-16 CPU = 66.6/100 MHz Min. Typ. Max. Unit 14.318 MHz 1 4 V/ns ...

Page 7

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. PRELIMINARY W48C111-16 ...

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