ICS951413CGLF IDT, Integrated Device Technology Inc, ICS951413CGLF Datasheet - Page 12

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ICS951413CGLF

Manufacturer Part Number
ICS951413CGLF
Description
IC SYSTEM CLOCK CHIP P4 56-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock/Frequency Synthesizerr
Datasheet

Specifications of ICS951413CGLF

Input
Crystal
Output
Clock
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Frequency-max
400MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
951413CGLF

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0929D—10/30/06
SMBus Table: M/N Programming & WD Safe Frequency Control Register
SMBus Table: CPU Frequency Control Register
SMBus Table: CPU Frequency Control Register
SMBus Table: CPU Spread Spectrum Control Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 10
Byte 11
Byte 12
Byte 13
Integrated
Circuit
Systems, Inc.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Pin #
Pin #
Pin #
Pin #
WD Safe Freq
Reserved
M/N_EN
WD SF4
WD SF3
WD SF2
WD SF1
WD SF0
Source
M Div5
M Div4
M Div3
M Div2
M Div1
M Div0
N Div8
N Div9
N Div7
N Div6
N Div5
N Div4
N Div3
N Div2
N Div1
N Div0
Name
Name
Name
Name
SSP7
SSP6
SSP5
SSP4
SSP3
SSP2
SSP1
SSP0
M Divider Programming
N Divider Programming
Watch Dog Safe Freq
WD Safe Freq Source
Programming bit(7:0)
Programming Enable
N Divider Prog bit 8
N Divider Prog bit 9
Byte12 bit(7:0) and
Control Function
Control Function
Control Function
Control Function
Spread Spectrum
Programming bits
Byte11 bit(7:6)
PLLS M/N
Reserved
bit (5:0)
12
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
table. VCO Frequency =
table. VCO Frequency =
These Spread Spectrum
14.318 x [NDiv(9:0)+8] /
14.318 x [NDiv(9:0)+8] /
representation of M and
representation of M and
will program the spread
N Divier in Byte 11 and
N Divier in Byte 11 and
Writing to these bit will
frequency as Byte0 bit
latch-in or Byte 0 Rom
latch-in or Byte 0 Rom
CPU VCO frequency.
CPU VCO frequency.
B10b(4:0)
bits in Byte 13 and 14
Default at power up =
Default at power up =
12 will configure the
12 will configure the
Disable
configure the safe
pecentage of CPU
0
0
0
0
-
[MDiv(5:0)+2]
[MDiv(5:0)+2]
The decimal
The decimal
(4:0).
Enable
Latch
Inputs
1
1
1
1
-
PWD
PWD
PWD
PWD
ICS951413
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
0
0
0
0

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