ICS932S421CFLF IDT, Integrated Device Technology Inc, ICS932S421CFLF Datasheet - Page 17

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ICS932S421CFLF

Manufacturer Part Number
ICS932S421CFLF
Description
IC PCIE GEN2 MAIN CLOCK 56-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Generatorr
Datasheet

Specifications of ICS932S421CFLF

Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Frequency-max
400MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output
-
Input
-
Other names
932S421CFLF
1460E—08/25/09
SMBus Table: SRC/PCI Frequency Control Register
SMBus Table: SRC/PCI Frequency Control Register
SMBus Table: SRC/PCI Spread Spectrum Control Register
SMBus Table: SRC/PCI Spread Spectrum Control Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 15
Byte 16
Byte 17
Byte 18
Integrated
Circuit
Systems, Inc.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Pin #
Pin #
Pin #
Pin #
SRC M Div5
SRC M Div4
SRC M Div3
SRC M Div2
SRC M Div1
SRC M Div0
SRC N Div8
SRC N Div9
SRC N Div7
SRC N Div6
SRC N Div5
SRC N Div4
SRC N Div3
SRC N Div2
SRC N Div1
SRC N Div0
SRC SSP14
SRC SSP13
SRC SSP12
SRC SSP11
SRC SSP10
SRC SSP7
SRC SSP6
SRC SSP5
SRC SSP4
SRC SSP3
SRC SSP2
SRC SSP1
SRC SSP0
SRC SSP9
SRC SSP8
Reserved
Name
Name
Name
Name
M Divider Programming
N Divider Programming
Programming b(14:8)
Programming b(7:0)
N Divider Prog bit 8
N Divider Prog bit 9
Control Function
Control Function
Control Function
Control Function
Spread Spectrum
Spread Spectrum
17
Reserved
b(7:0)
bits
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
frequency. Default at power up
frequency. Default at power up
Byte 17 and 18 will program the
Byte 17 and 18 will program the
M and N Divider in Byte 15 and
M and N Divider in Byte 15 and
These Spread Spectrum bits in
These Spread Spectrum bits in
16 will configure the SRC VCO
16 will configure the SRC VCO
= latch-in or Byte 0 Rom table.
= latch-in or Byte 0 Rom table.
The decimal representation of
The decimal representation of
[NDiv(9:0)+8] / [MDiv(5:0)+2]
[NDiv(9:0)+8] / [MDiv(5:0)+2]
VCO Frequency = 14.318 x
VCO Frequency = 14.318 x
spread pecentage of SRC
spread pecentage of SRC
0
0
0
0
-
ICS932S421C
1
1
1
1
-
PWD
PWD
PWD
PWD
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0

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