ICS932S422CGLF IDT, Integrated Device Technology Inc, ICS932S422CGLF Datasheet
ICS932S422CGLF
Specifications of ICS932S422CGLF
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ICS932S422CGLF Summary of contents
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Integrated Circuit Systems, Inc. PCIe Gen 2 main Clock for Intel-based Servers Recommended Application: PCIe Gen 2 & FBD compliant CK410B/CK410B+ clock for Intel-based servers Output Features: • 0.7V current-mode differential CPU pairs • 0.7V current-mode ...
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Integrated Circuit Systems, Inc. Pin Description Pin # PIN NAME 1 VDDPCI 2 GNDPCI 3 PCICLK0 4 PCICLK1 5 PCICLK2 6 PCICLK3 7 GNDPCI 8 VDDPCI 9 PCICLK_F0 10 PCICLK_F1 11 PCICLK_F2 12 VDD48 13 48MHz 14 GND48 15 VDDSRC ...
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Integrated Circuit Systems, Inc. Pin Description (Continued) Pin # PIN NAME 29 SCLK 30 SDATA 31 CPUCLKC4 32 CPUCLKT4 33 IREF 34 GNDA 35 VDDA 36 CPUCLKC3 37 CPUCLKT3 38 VDDCPU 39 CPUCLKC2 40 CPUCLKT2 41 GNDCPU 42 CPUCLKC1 43 ...
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Integrated Circuit Systems, Inc. General Description The ICS932S422C is a main clock synthesizer for CK410-generation Intel server platforms. The ICS932S422C is driven with a 14.318MHz crystal. It generates 5 CPU output pairs up to 400MHz and PCI-Express clocks at 100 ...
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Integrated Circuit Systems, Inc. Single-ended Output Terminations ICS932S422 SEPP Output Buffer (Single Ended Push Pull) SEPP Output Buffer (Single Ended Push Pull) The singled-ended outputs of the ICS 932S422 default to a drive strength of 2 loads. The REF clocks ...
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Integrated Circuit Systems, Inc. Absolute Maximum Rating PARAMETER SYMBOL 3.3V Core Supply Voltage VDD_A 3.3V Logic Input Supply VDD_In Voltage Storage Temperature Ts Ambient Operating Temp Tambient Case Temperature Tcase Input ESD protection HBM ESD prot 1 Guaranteed by design ...
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Integrated Circuit Systems, Inc. Electrical Characteristics - CPU 0.7V Current Mode Differential Pair PARAMETER SYMBOL Current Source Output Impedance Zo Voltage High VHigh Voltage Low VLow Max Voltage Vovs Min Voltage Vuds Crossing Voltage (abs) Vx(abs) Crossing Voltage (var) d-Vx ...
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Integrated Circuit Systems, Inc. Electrical Characteristics - SRC/SATA 0.7V Current Mode Differential Pair PARAMETER SYMBOL Current Source Output Impedance Zo Voltage High VHigh Voltage Low VLow Max Voltage Vovs Min Voltage Vuds Crossing Voltage (abs) Vx(abs) Crossing Voltage (var) d-Vx ...
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Integrated Circuit Systems, Inc. Electrical Characteristics - USB48MHz PARAMETER SYMBOL Long Accuracy ppm T Clock period period R Output Impedance DSP V Output High Voltage OH V Output Low Voltage OL Output High Current Output Low Current ...
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Integrated Circuit Systems, Inc. General SMBus serial interface information for the ICS932S422C How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • Controller (host) sends the ...
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Integrated Circuit Systems, Inc. SMBus Table: SRC Output Enable Register Byte 0 Pin # Name NA SRCCLK7 Enable Bit 7 NA SRCCLK6 Enable Bit 6 NA SRCCLK5 Enable Bit 5 26,27 SRCCLK4 Enable Bit 4 23,24 SRCCLK3 Enable Bit 3 ...
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Integrated Circuit Systems, Inc. SMBus Table: CPU and SRC Stop and Power Down Mode Drive Control Register Byte 4 Pin # Name CPUCLK3 PD Drive Bit 7 36,37 CPUCLK2 PD Drive Bit 6 39,40 CPUCLK1 PD Drive Bit 5 42,43 ...
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Integrated Circuit Systems, Inc. SMBus Table: Byte Count Register Byte 8 Pin # Name - BC7 Bit 7 - BC6 Bit 6 - BC5 Bit 5 - BC4 Bit 4 - BC3 Bit 3 - BC2 Bit 2 - BC1 ...
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Integrated Circuit Systems, Inc. SMBus Table: CPU Frequency Control Register Byte 11 Pin # Name - CPU N Div8 Bit 7 - CPU N Div9 Bit 6 - CPU M Div5 Bit 5 - CPU M Div4 Bit 4 - ...
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Integrated Circuit Systems, Inc. SMBus Table: SRC Frequency Control Register Byte 15 Pin # Name - SRC N Div8 Bit 7 - SRC N Div9 Bit 6 - SRC M Div5 Bit 5 - SRC M Div4 Bit 4 - ...
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Integrated Circuit Systems, Inc. SMBus Table: CPU Programmable Output Divider Register Byte 19 Pin # Name - Bit 7 CPUDiv3 - CPUDiv2 Bit 6 - CPUDiv1 Bit 5 - CPUDiv0 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ...
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Integrated Circuit Systems, Inc. PD, Power Down asynchronous active high input used to shut off all clocks cleanly prior to system power down. When PD is asserted, all clocks will be driven low before turning off the ...
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Integrated Circuit Systems, Inc. PD De-assertion The time from the de-assertion until power supply ramps to get stable clocks will be less than 1.8ms. If the drive mode control bit for PD tristate is programmed to '1' ...
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Integrated Circuit Systems, Inc INDEX INDEX AREA AREA 45° 45° .10 (.004) C .10 (.004) C Ordering Information ICS932S422CFLF-T Example: ICS XXXX C F ...
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... INDEX INDEX AREA AREA Ordering Information ICS932S422CGLF-T Example: ICS XXXX C G LF- T Designation for tape and reel packaging Annealed Lead Free (optional) Package Type Revision Designator (will not correlate with datasheet revision) Device Type Prefix 1412A—12/10/07 c SYMBOL L VARIATIONS Ref erence Doc.: JEDEC Publicat ion 95, M O-153 ...
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Integrated Circuit Systems, Inc. Revision History Rev. Issue Date Description A 12/10/07 Initial Release 1412A—12/10/07 Page # 21 ICS932S422C - ...