MK2049-34SAILFTR IDT, Integrated Device Technology Inc, MK2049-34SAILFTR Datasheet - Page 3

• Manufacturer Part Number: MK2049-34SAILFTR
• Description: IC VCXO PLL CLK SYNTH 20-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Synthesizerr

Specifications of MK2049-34SAILFTR

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 1:3
• Differential - Input:output: No/No
• Frequency - Max: 77.76MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC
• Frequency-max: 44.736MHz
• Number Of Elements: 2
• Supply Current: 7mA
• Pll Input Freq (min): 8KHz
• Pll Input Freq (max): 36MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SOIC
• Output Frequency Range: 1.544 to 77.76MHz
• Operating Supply Voltage (min): 3.15V
• Operating Supply Voltage (max): 3.45V
• Operating Temperature Classification: Industrial
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Output Decoding Table - External Mode (MHz)
Output Decoding Table - Loop Timing Mode (MHz)
Output Decoding Table - Buffer Mode (MHz)
0 = connect directly to ground, 1 = connect directly to VDD
Crystal is connected to pins 2 and 3; clock input is applied to pin 13.
Operating Modes
The MK2049-34A has three operating modes: External, Loop Timing, and Buffer. Although each mode uses an input clock
to generate various output clocks, there are important differences in their input and crystal requirements.
External Mode
The MK2049-34 accepts an external 8 kHz clock and will produce a number of common communication clock frequencies.
The 8 kHz input clock does not need to have a 50% duty cycle; a “high” or “on” pulse as narrow as 10 ns is acceptable. In
the MK2049-34, the rising edges of CLK and CLK/2 are both aligned with the rising edge of the 8 kHz ICLK; refer to Figure
1 on page 4 for more details.
Loop Timing Mode
This mode can be used to remove the jitter from standard high-frequency communication clocks. For T1 and E1 inputs, the
CLK/2 output will be the same as the input frequency, with CLK at twice the input frequency.
IDT™ / 3.3 VOLT COMMUNICATIONS CLOCK VCXO PLL
19 - 36
10 - 18
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
MK2049-34A
3.3 VOLT COMMUNICATIONS CLOCK VCXO PLL
ICLK
1.544
2.048
ICLK
ICLK
FS3
0
0
0
0
0
0
0
0
1
1
1
1
FS3
FS3
1
1
1
1
FS2
0
0
0
0
1
1
1
1
0
0
1
1
FS2
FS2
0
0
1
1
FS1
0
0
1
1
0
0
1
1
1
1
0
0
FS1
FS1
0
0
1
1
FS0
0
1
0
1
0
1
0
1
0
1
0
1
FS0
FS0
0
1
0
1
22.368
17.184
16.384
17.664
18.688
10.752
CLK/2
1.544
2.048
19.44
10.24
38.88
7.68
2*ICLK
ICLK/2
CLK/2
CLK/2
1.544
2.048
44.736
34.368
32.768
35.328
37.376
21.504
3.088
4.096
38.88
15.36
20.48
77.76
CLK
4*ICLK
3.088
4.096
ICLK
CLK
CLK
3
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8k
N/A
N/A
N/A
N/A
8k
8k
Used (MHz)
Crystal
12.352
12.288
11.184
11.456
17.664
10.752
8.192
9.344
15.36
10.24
9.72
9.72
Crystal
Crystal
12.352
12.288
ICLK/2
ICLK
1544
1536
1398
1432
1215
1024
2208
1168
1920
1344
1280
1215
N
24
18
N
N
3
3
VCXO AND SYNTHESIZER
MK2049-34A REV E 051310